1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
|
#Copyright (C) 2016 Marvell International Ltd.
#
#Marvell BSD License Option
#
#If you received this File from Marvell, you may opt to use, redistribute and/or
#modify this File under the following licensing terms.
#Redistribution and use in source and binary forms, with or without modification,
#are permitted provided that the following conditions are met:
#
# * Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.
#
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# * Neither the name of Marvell nor the names of its contributors may be
# used to endorse or promote products derived from this software without
# specific prior written permission.
#
#THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
#ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
#WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
#DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
#ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
#(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
#LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
#ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
#(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
#SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
################################################################################
#
# Defines Section - statements that will be processed to create a Makefile.
#
################################################################################
[Defines]
PLATFORM_NAME = Armada70x0
PLATFORM_GUID = f837e231-cfc7-4f56-9a0f-5b218d746ae3
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)-$(ARCH)
SUPPORTED_ARCHITECTURES = AARCH64|ARM
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/Marvell/Armada/Armada70x0.fdf
!include Armada.dsc.inc
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
#
################################################################################
[PcdsFixedAtBuild.common]
#MPP
gMarvellTokenSpaceGuid.PcdMppChipCount|2
# APN806-A0 MPP SET
gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE
gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000
gMarvellTokenSpaceGuid.PcdChip0MppPinCount|20
gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x1, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3 }
# CP110 MPP SET - Router configuration
gMarvellTokenSpaceGuid.PcdChip1MppReverseFlag|FALSE
gMarvellTokenSpaceGuid.PcdChip1MppBaseAddress|0xF2440000
gMarvellTokenSpaceGuid.PcdChip1MppPinCount|64
gMarvellTokenSpaceGuid.PcdChip1MppSel0|{ 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4 }
gMarvellTokenSpaceGuid.PcdChip1MppSel1|{ 0x4, 0x4, 0x0, 0x3, 0x3, 0x3, 0x3, 0x0, 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdChip1MppSel2|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x9, 0xA }
gMarvellTokenSpaceGuid.PcdChip1MppSel3|{ 0xA, 0x0, 0x7, 0x0, 0x7, 0x7, 0x7, 0x2, 0x2, 0x0 }
gMarvellTokenSpaceGuid.PcdChip1MppSel4|{ 0x0, 0x0, 0x0, 0x0, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdChip1MppSel5|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0xE, 0xE, 0xE, 0xE }
gMarvellTokenSpaceGuid.PcdChip1MppSel6|{ 0xE, 0xE, 0xE, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
# I2C
gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60 }
gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 }
gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000
gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
gMarvellTokenSpaceGuid.PcdI2cBusCount|2
#SPI
gMarvellTokenSpaceGuid.PcdSpiRegBase|0xF2700680
gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|10000000
gMarvellTokenSpaceGuid.PcdSpiClockFrequency|200000000
gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd|0x70
gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|3
gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536
gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256
gMarvellTokenSpaceGuid.PcdSpiFlashId|{ 0x20, 0xBA, 0x18 }
gMarvellTokenSpaceGuid.PcdSpiFlashMode|3
gMarvellTokenSpaceGuid.PcdSpiFlashCs|0
#ComPhy
gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
# ComPhy0
# 0: SGMII1 1.25 Gbps
# 1: USB3_HOST0 5 Gbps
# 2: SFI 10.31 Gbps
# 3: SATA1 5 Gbps
# 4: USB3_HOST1 5 Gbps
# 5: PCIE2 5 Gbps
gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|{ $(CP_SGMII1), $(CP_USB3_HOST0), $(CP_SFI), $(CP_SATA1), $(CP_USB3_HOST1), $(CP_PCIE2) }
gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|{ $(CP_1_25G), $(CP_5G), $(CP_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) }
#UtmiPhy
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1 }
gMarvellTokenSpaceGuid.PcdUtmiPortType|{ $(UTMI_USB_HOST0), $(UTMI_USB_HOST1) }
#MDIO
gMarvellTokenSpaceGuid.PcdMdioControllersEnabled|{ 0x1, 0x0 }
#PHY
gMarvellTokenSpaceGuid.PcdPhy2MdioController|{ 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdPhySmiAddresses|{ 0x0, 0x1 }
gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE
#NET
gMarvellTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 }
gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x0, 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ $(PHY_SPEED_10000), $(PHY_SPEED_1000), $(PHY_SPEED_1000) }
gMarvellTokenSpaceGuid.PcdPp2PhyConnectionTypes|{ $(PHY_SFI), $(PHY_SGMII), $(PHY_RGMII) }
gMarvellTokenSpaceGuid.PcdPp2PhyIndexes|{ 0xFF, 0x0, 0x1 }
gMarvellTokenSpaceGuid.PcdPp2Port2Controller|{ 0x0, 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 }
gMarvellTokenSpaceGuid.PcdPp2Controllers|{ 0x1 }
#PciEmulation
gMarvellTokenSpaceGuid.PcdPciEXhci|{ 0x1, 0x1, 0x0, 0x0 }
gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x1, 0x0 }
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
|