blob: 6ddc6cf5902c363591275d29f732740be85522c4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
|
/** @file
*
* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
* Copyright (c) 2015, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef _PROCESSOR_SUBCLASS_DRIVER_H
#define _PROCESSOR_SUBCLASS_DRIVER_H
#include <Uefi.h>
#include <Protocol/Smbios.h>
#include <IndustryStandard/SmBios.h>
#include <Library/HiiLib.h>
#include <Library/DebugLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/UefiLib.h>
#include <Library/PrintLib.h>
#include <Library/PcdLib.h>
#include <PlatformArch.h>
#include <Library/PlatformSysCtrlLib.h>
#include <Library/OemMiscLib.h>
#include <Library/ArmLib.h>
//
// This is the generated header file which includes whatever needs to be exported (strings + IFR)
//
extern UINT8 ProcessorSubClassStrings[];
#define CPU_CACHE_L1_Instruction 0
#define CPU_CACHE_L1_Data 1
#define CPU_CACHE_L2 2
#define CPU_CACHE_L3 3
#define MAX_CACHE_LEVEL 4
#define EXTERNAL_CLOCK 50 //50 MHz
#define CPU_MAX_SPEED 2100 //2.1G
//
// Cache Info
//
typedef struct {
UINT16 InstalledSize; //In KB
CACHE_TYPE_DATA SystemCacheType;
CACHE_ASSOCIATIVITY_DATA Associativity;
} CACHE_INFO;
//
// Cache Configuration
//
typedef union {
struct {
UINT16 Level :3;
UINT16 Socketed :1;
UINT16 Reserved1 :1;
UINT16 Location :2;
UINT16 Enable :1;
UINT16 OperationalMode :2;
UINT16 Reserved2 :6;
} Bits;
UINT16 Data;
}CACHE_CONFIGURATION;
//
// Processor Status
//
typedef union {
struct {
UINT8 CpuStatus :3; // Indicates the status of the processor.
UINT8 Reserved1 :3; // Reserved for future use. Should be set to zero.
UINT8 SocketPopulated :1; // Indicates if the processor socket is populated or not.
UINT8 Reserved2 :1; // Reserved for future use. Should be set to zero.
} Bits;
UINT8 Data;
}PROCESSOR_STATUS_DATA;
//
// Processor Characteristics
//
typedef union {
struct {
UINT16 Reserved :1;
UINT16 Unknown :1;
UINT16 Capable64Bit :1;
UINT16 MultiCore :1;
UINT16 HardwareThread :1;
UINT16 ExecuteProtection :1;
UINT16 EnhancedVirtualization :1;
UINT16 PowerPerformanceControl :1;
UINT16 Reserved2 :8;
} Bits;
UINT16 Data;
} PROCESSOR_CHARACTERISTICS_DATA;
#endif
|
