summaryrefslogtreecommitdiff
path: root/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
blob: b44c58d610621c49cd93a1ffa86df1fddf6b8692 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
/** @file
*
*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
*  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
*
*  This program and the accompanying materials
*  are licensed and made available under the terms and conditions of the BSD License
*  which accompanies this distribution.  The full text of the license may be found at
*  http://opensource.org/licenses/bsd-license.php
*
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/

#include <PiPei.h>

#include <Library/ArmLib.h>
#include <Library/ArmMmuLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PeiServicesLib.h>
#include <Library/PeiServicesTablePointerLib.h>

#include <Platform/MemoryMap.h>
#include <Platform/Pcie.h>

#include <Ppi/Capsule.h>
#include <Ppi/DramInfo.h>

#define ARM_MEMORY_REGION(Base, Size) \
  { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK }

#define ARM_UNCACHED_REGION(Base, Size) \
  { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED }

#define ARM_DEVICE_REGION(Base, Size) \
  { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_DEVICE }

#define ARM_CACHED_DEVICE_REGION(Base, Size) \
  { (Base), (Base), (Size), ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE }

VOID
BuildMemoryTypeInformationHob (
  VOID
  );

STATIC CONST EFI_RESOURCE_ATTRIBUTE_TYPE mDramResourceAttributes =
  EFI_RESOURCE_ATTRIBUTE_PRESENT |
  EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
  EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
  EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
  EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
  EFI_RESOURCE_ATTRIBUTE_TESTED;

STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
  // Memory mapped SPI NOR flash
  ARM_CACHED_DEVICE_REGION (FixedPcdGet64 (PcdFdBaseAddress),
                            FixedPcdGet32 (PcdFdSize)),

  // SynQuacer OnChip peripherals
  ARM_DEVICE_REGION (SYNQUACER_PERIPHERALS_BASE,
                     SYNQUACER_PERIPHERALS_SZ),

  // SynQuacer OnChip non-secure SRAM
  ARM_CACHED_DEVICE_REGION (SYNQUACER_NON_SECURE_SRAM_BASE,
                            SYNQUACER_NON_SECURE_SRAM_SZ),

  // SynQuacer GIC-500
  ARM_DEVICE_REGION (SYNQUACER_GIC500_DIST_BASE, SYNQUACER_GIC500_DIST_SIZE),
  ARM_DEVICE_REGION (SYNQUACER_GIC500_RDIST_BASE, SYNQUACER_GIC500_RDIST_SIZE),

  // SynQuacer eMMC(SDH30)
  ARM_DEVICE_REGION (SYNQUACER_EMMC_BASE, SYNQUACER_EMMC_BASE_SZ),

  // SynQuacer GPIO block
  ARM_DEVICE_REGION (SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE),

  // SynQuacer EEPROM - could point to NOR flash as well
  ARM_CACHED_DEVICE_REGION (FixedPcdGet32 (PcdNetsecEepromBase),
                            SYNQUACER_EEPROM_BASE_SZ),

  // SynQuacer NETSEC
  ARM_DEVICE_REGION (SYNQUACER_NETSEC1_BASE, SYNQUACER_NETSEC1_BASE_SZ),

  // PCIe control registers
  ARM_DEVICE_REGION (SYNQUACER_PCIE_BASE, SYNQUACER_PCIE_SIZE),

  // PCIe config space
  ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_CONFIG_BASE,
                     SYNQUACER_PCI_SEG0_CONFIG_SIZE),
  ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_CONFIG_BASE,
                     SYNQUACER_PCI_SEG1_CONFIG_SIZE),

  // PCIe I/O space
  ARM_DEVICE_REGION (SYNQUACER_PCI_SEG0_PORTIO_MEMBASE,
                     SYNQUACER_PCI_SEG0_PORTIO_MEMSIZE),
  ARM_DEVICE_REGION (SYNQUACER_PCI_SEG1_PORTIO_MEMBASE,
                     SYNQUACER_PCI_SEG1_PORTIO_MEMSIZE),

  // variable store
  ARM_DEVICE_REGION (FixedPcdGet32 (PcdFip006DxeRegBaseAddress),
                     EFI_PAGE_SIZE),
  ARM_DEVICE_REGION (FixedPcdGet32 (PcdFip006DxeMemBaseAddress),
                     EFI_PAGE_SIZE),
  ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageVariableBase),
                     FixedPcdGet32 (PcdFlashNvStorageVariableSize)),
  ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageFtwWorkingBase),
                     FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize)),
  ARM_DEVICE_REGION (FixedPcdGet32 (PcdFlashNvStorageFtwSpareBase),
                     FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize)),
};

STATIC
EFI_STATUS
DeclareDram (
  OUT ARM_MEMORY_REGION_DESCRIPTOR    **VirtualMemoryTable
  )
{
  SYNQUACER_DRAM_INFO_PPI       *DramInfo;
  EFI_STATUS                    Status;
  UINTN                         Idx;
  UINTN                         RegionCount;
  UINT64                        Base;
  UINT64                        Size;
  ARM_MEMORY_REGION_DESCRIPTOR  *DramDescriptor;

  Status = PeiServicesLocatePpi (&gSynQuacerDramInfoPpiGuid, 0, NULL,
             (VOID **)&DramInfo);
  if (EFI_ERROR (Status)) {
    return Status;
  }

  Status = DramInfo->GetRegionCount (&RegionCount);
  if (EFI_ERROR (Status)) {
    return Status;
  }

  *VirtualMemoryTable = AllocatePool (sizeof (mVirtualMemoryTable) +
                                      (RegionCount + 1) *
                                      sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
  if (*VirtualMemoryTable == NULL) {
    return EFI_OUT_OF_RESOURCES;
  }
  CopyMem (*VirtualMemoryTable, mVirtualMemoryTable,
    sizeof (mVirtualMemoryTable));

  DramDescriptor = *VirtualMemoryTable + ARRAY_SIZE (mVirtualMemoryTable);

  for (Idx = 0; Idx < RegionCount; Idx++, DramDescriptor++) {
    Status = DramInfo->GetRegion (Idx, &Base, &Size);
    ASSERT_EFI_ERROR (Status);

    BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
      mDramResourceAttributes, Base, Size);

    DramDescriptor->PhysicalBase = Base;
    DramDescriptor->VirtualBase  = Base;
    DramDescriptor->Length       = Size;
    DramDescriptor->Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
  }

  DramDescriptor->PhysicalBase = 0;
  DramDescriptor->VirtualBase  = 0;
  DramDescriptor->Length       = 0;
  DramDescriptor->Attributes   = 0;

  return EFI_SUCCESS;
}

EFI_STATUS
EFIAPI
MemoryPeim (
  IN EFI_PHYSICAL_ADDRESS       UefiMemoryBase,
  IN UINT64                     UefiMemorySize
  )
{
  EFI_STATUS                    Status;
  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
  EFI_PEI_SERVICES              **PeiServices;
  PEI_CAPSULE_PPI               *Capsule;
  VOID                          *CapsuleBuffer;
  UINTN                         CapsuleBufferLength;
  BOOLEAN                       HaveCapsule;

  Status = DeclareDram (&VirtualMemoryTable);
  ASSERT_EFI_ERROR (Status);
  if (EFI_ERROR (Status)) {
    return Status;
  }

  PeiServices = (EFI_PEI_SERVICES **) GetPeiServicesTablePointer ();
  ASSERT (PeiServices != NULL);

  Status = PeiServicesLocatePpi (&gPeiCapsulePpiGuid, 0, NULL,
             (VOID **)&Capsule);
  ASSERT_EFI_ERROR (Status);

  //
  // Check for persistent capsules
  //
  HaveCapsule = FALSE;
  Status = Capsule->CheckCapsuleUpdate (PeiServices);
  if (!EFI_ERROR (Status)) {

    //
    // Coalesce the capsule into unused memory. CreateState() below will copy
    // it to a properly allocated buffer.
    //
    CapsuleBuffer = (VOID *)PcdGet64 (PcdSystemMemoryBase);
    CapsuleBufferLength = UefiMemoryBase - PcdGet64 (PcdSystemMemoryBase);

    PeiServicesSetBootMode (BOOT_ON_FLASH_UPDATE);

    Status = Capsule->Coalesce (PeiServices, &CapsuleBuffer,
                           &CapsuleBufferLength);
    if (!EFI_ERROR (Status)) {
      DEBUG ((DEBUG_INFO, "%a: Coalesced capsule @ %p (0x%lx)\n",
        __FUNCTION__, CapsuleBuffer, CapsuleBufferLength));
      HaveCapsule = TRUE;
    } else {
      DEBUG ((DEBUG_WARN, "%a: failed to coalesce() capsule (Status == %r)\n",
        __FUNCTION__, Status));
    }
  }

  Status = ArmConfigureMmu (VirtualMemoryTable, NULL, NULL);
  ASSERT_EFI_ERROR (Status);
  if (EFI_ERROR (Status)) {
    return Status;
  }

  if (HaveCapsule) {
    Status = Capsule->CreateState (PeiServices, CapsuleBuffer,
                        CapsuleBufferLength);

    if (EFI_ERROR (Status)) {
      DEBUG ((DEBUG_WARN, "%a: Capsule->CreateState failed (Status == %r)\n",
        __FUNCTION__, Status));
    }
  }

  if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) {
    // Optional feature that helps prevent EFI memory map fragmentation.
    BuildMemoryTypeInformationHob ();
  }
  return EFI_SUCCESS;
}