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author | Nathanael Premillieu <nathanael.premillieu@arm.com> | 2017-04-05 12:46:06 -0500 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-05 14:43:49 +0000 |
commit | 5e8287d2e2eaf058495442ea9e32fafc343a0b53 (patch) | |
tree | 7d0891b8984926f8e404d6ca8247f45695f9fc9b /src/arch/arm/insts/mem64.cc | |
parent | 864f87f9c56a66dceeca0f4e9470fbaa3001b627 (diff) | |
download | gem5-5e8287d2e2eaf058495442ea9e32fafc343a0b53.tar.xz |
arch, cpu: Architectural Register structural indexing
Replace the unified register mapping with a structure associating
a class and an index. It is now much easier to know which class of
register the index is referring to. Also, when adding a new class
there is no need to modify existing ones.
Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2700
Diffstat (limited to 'src/arch/arm/insts/mem64.cc')
-rw-r--r-- | src/arch/arm/insts/mem64.cc | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/arch/arm/insts/mem64.cc b/src/arch/arm/insts/mem64.cc index 52e2fc7db..0aee63f2c 100644 --- a/src/arch/arm/insts/mem64.cc +++ b/src/arch/arm/insts/mem64.cc @@ -54,7 +54,7 @@ SysDC64::generateDisassembly(Addr pc, const SymbolTable *symtab) const std::stringstream ss; printMnemonic(ss, "", false); ccprintf(ss, ", ["); - printReg(ss, base); + printIntReg(ss, base); ccprintf(ss, "]"); return ss.str(); } @@ -65,9 +65,9 @@ void Memory64::startDisassembly(std::ostream &os) const { printMnemonic(os, "", false); - printReg(os, dest); + printIntReg(os, dest); ccprintf(os, ", ["); - printReg(os, base); + printIntReg(os, base); } void @@ -100,11 +100,11 @@ MemoryDImm64::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss, "", false); - printReg(ss, dest); + printIntReg(ss, dest); ccprintf(ss, ", "); - printReg(ss, dest2); + printIntReg(ss, dest2); ccprintf(ss, ", ["); - printReg(ss, base); + printIntReg(ss, base); if (imm) ccprintf(ss, ", #%d", imm); ccprintf(ss, "]"); @@ -116,13 +116,13 @@ MemoryDImmEx64::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss, "", false); - printReg(ss, result); + printIntReg(ss, result); ccprintf(ss, ", "); - printReg(ss, dest); + printIntReg(ss, dest); ccprintf(ss, ", "); - printReg(ss, dest2); + printIntReg(ss, dest2); ccprintf(ss, ", ["); - printReg(ss, base); + printIntReg(ss, base); if (imm) ccprintf(ss, ", #%d", imm); ccprintf(ss, "]"); @@ -173,11 +173,11 @@ MemoryEx64::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss, "", false); - printReg(ss, dest); + printIntReg(ss, dest); ccprintf(ss, ", "); - printReg(ss, result); + printIntReg(ss, result); ccprintf(ss, ", ["); - printReg(ss, base); + printIntReg(ss, base); ccprintf(ss, "]"); return ss.str(); } @@ -187,7 +187,7 @@ MemoryLiteral64::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss, "", false); - printReg(ss, dest); + printIntReg(ss, dest); ccprintf(ss, ", #%d", pc + imm); return ss.str(); } |