diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2007-08-01 15:12:07 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-08-01 15:12:07 -0700 |
| commit | 8da3e0548e76795f74af5ff8f4ffadf3d0b5191b (patch) | |
| tree | fb80d3ba61318edbc1484c70f524133a64981618 /src/arch/mips/regfile | |
| parent | c4c8a121863fcbde7ba67823f06a3f7564c27cba (diff) | |
| parent | 84cd78e96f892f52a715cfe10d9405987f5e9ba1 (diff) | |
| download | gem5-8da3e0548e76795f74af5ff8f4ffadf3d0b5191b.tar.xz | |
Merge with head.
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
Diffstat (limited to 'src/arch/mips/regfile')
| -rwxr-xr-x | src/arch/mips/regfile/misc_regfile.cc | 8 | ||||
| -rw-r--r-- | src/arch/mips/regfile/misc_regfile.hh | 11 | ||||
| -rw-r--r-- | src/arch/mips/regfile/regfile.hh | 8 |
3 files changed, 14 insertions, 13 deletions
diff --git a/src/arch/mips/regfile/misc_regfile.cc b/src/arch/mips/regfile/misc_regfile.cc index 71be3adf9..02e9c92bb 100755 --- a/src/arch/mips/regfile/misc_regfile.cc +++ b/src/arch/mips/regfile/misc_regfile.cc @@ -30,13 +30,13 @@ #include "base/bitfield.hh" -#include "arch/mips/regfile/misc_regfile.hh" -#include "arch/mips/mt_constants.hh" #include "arch/mips/faults.hh" +#include "arch/mips/mt.hh" +#include "arch/mips/mt_constants.hh" +#include "arch/mips/regfile/misc_regfile.hh" -#include "cpu/thread_context.hh" #include "cpu/base.hh" -#include "cpu/exetrace.hh" +#include "cpu/thread_context.hh" //#include "cpu/mixie/cpu.hh" using namespace std; diff --git a/src/arch/mips/regfile/misc_regfile.hh b/src/arch/mips/regfile/misc_regfile.hh index 54b086a8b..0846378bb 100644 --- a/src/arch/mips/regfile/misc_regfile.hh +++ b/src/arch/mips/regfile/misc_regfile.hh @@ -33,14 +33,12 @@ #include "arch/mips/isa_traits.hh" #include "arch/mips/types.hh" -#include "arch/mips/mt.hh" -#include "arch/mips/mt_constants.hh" -#include "base/bitfield.hh" -#include "cpu/base.hh" +#include "sim/eventq.hh" #include "sim/faults.hh" #include <queue> class ThreadContext; +class BaseCPU; namespace MipsISA { @@ -76,7 +74,10 @@ namespace MipsISA void expandForMultithreading(unsigned num_threads, unsigned num_vpes); - void copyMiscRegs(ThreadContext *tc); + void copyMiscRegs(ThreadContext *tc) + { + panic("Copy Misc. Regs Not Implemented Yet\n"); + } inline unsigned getVPENum(unsigned tid); diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh index f13653132..b83bb576b 100644 --- a/src/arch/mips/regfile/regfile.hh +++ b/src/arch/mips/regfile/regfile.hh @@ -32,8 +32,6 @@ #define __ARCH_MIPS_REGFILE_REGFILE_HH__ #include "arch/mips/types.hh" -#include "arch/mips/isa_traits.hh" -#include "arch/mips/mt.hh" #include "arch/mips/regfile/int_regfile.hh" #include "arch/mips/regfile/float_regfile.hh" #include "arch/mips/regfile/misc_regfile.hh" @@ -189,9 +187,11 @@ namespace MipsISA return reg; } - void copyRegs(ThreadContext *src, ThreadContext *dest); + void + copyRegs(ThreadContext *src, ThreadContext *dest); - void copyMiscRegs(ThreadContext *src, ThreadContext *dest); + void + copyMiscRegs(ThreadContext *src, ThreadContext *dest); } // namespace MipsISA |