cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.

1 files changed, 2 insertions, 0 deletions

diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh
index 1e52fc5a6..3f1524554 100644
--- a/src/arch/null/registers.hh
+++ b/src/arch/null/registers.hh
@@ -49,6 +49,8 @@ typedef uint32_t FloatRegBits;
 typedef float FloatReg;
 typedef uint8_t CCReg;
 typedef uint64_t MiscReg;
+typedef uint64_t VectorRegElement;
+typedef std::array<VectorRegElement, 0> VectorReg;
 
 }