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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-06-13 11:14:00 +0100 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-10-13 08:41:08 +0000 |
| commit | b10a0092aecbc6927e9a2336188615ed97614fd0 (patch) | |
| tree | d566b7e712bb7573de3aee0599d9ea5f5c1e4127 /src/arch/riscv | |
| parent | 64b8feeb0e70c7e138d7e9485ccacb7fd39ae044 (diff) | |
| download | gem5-b10a0092aecbc6927e9a2336188615ed97614fd0.tar.xz | |
mem: Signal the local monitor when clearing the global monitor
ARM systems require the coordination of the global and local
monitors. When the system is run without caches the global monitor is
implemented in the abstract memory object. This change adds a callback
from the abstract memory that notifies the local monitor when the
global monitor is cleared.
Additionally, for ARM systems the local monitor signals the event
register and wakes the thread context up. Subsequent wait-for-event
(WFE) instructions will be immediately signaled.
Change-Id: If6c038f3a6bea7239ba4258f07f39c7f9a30500b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3760
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/locked_mem.hh | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/riscv/locked_mem.hh b/src/arch/riscv/locked_mem.hh index d7fc0ca5a..f334385b1 100644 --- a/src/arch/riscv/locked_mem.hh +++ b/src/arch/riscv/locked_mem.hh @@ -126,6 +126,13 @@ handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask) return true; } +template <class XC> +inline void +globalClearExclusive(XC *xc) +{ + xc->getCpuPtr()->wakeup(xc->threadId()); +} + } // namespace RiscvISA #endif // __ARCH_RISCV_LOCKED_MEM_HH__ |