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author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-03 13:55:41 +0200 |
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committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-06-03 13:55:41 +0200 |
commit | 7846f59d0dcb36c13e06a3ba8a4c461e646582b6 (patch) | |
tree | 32b0ebd81cabb265409ad09e42285d2615354bdb /src/arch/x86/tlb.hh | |
parent | 63dae287035c9670c0622eefc9a19e0dc05c299f (diff) | |
download | gem5-7846f59d0dcb36c13e06a3ba8a4c461e646582b6.tar.xz |
arch: Create a method to finalize physical addresses
in the TLB
Some architectures (currently only x86) require some fixing-up of
physical addresses after a normal address translation. This is usually
to remap devices such as the APIC, but could be used for other memory
mapped devices as well. When running the CPU in a using hardware
virtualization, we still need to do these address fix-ups before
inserting the request into the memory system. This patch moves this
patch allows that code to be used by such CPUs without doing full
address translations.
Diffstat (limited to 'src/arch/x86/tlb.hh')
-rw-r--r-- | src/arch/x86/tlb.hh | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 39ae240af..4f0d58d5c 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -129,6 +129,22 @@ namespace X86ISA */ Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); + /** + * Do post-translation physical address finalization. + * + * Some addresses, for example requests going to the APIC, + * need post-translation updates. Such physical addresses are + * remapped into a "magic" part of the physical address space + * by this method. + * + * @param req Request to updated in-place. + * @param tc Thread context that created the request. + * @param mode Request type (read/write/execute). + * @return A fault on failure, NoFault otherwise. + */ + Fault finalizePhysical(RequestPtr req, ThreadContext *tc, + Mode mode) const; + TlbEntry * insert(Addr vpn, TlbEntry &entry); // Checkpointing |