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| author | Gabe Black <gblack@eecs.umich.edu> | 2012-06-04 10:43:09 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-06-04 10:43:09 -0700 |
| commit | 35fa5074aa256880f70591eb656dceeb1a7feae0 (patch) | |
| tree | 79704dcdb74aa43ee14c3cdb0d9aff19a41a570a /src/arch/x86/tlb.hh | |
| parent | 7b73c36f5d52073025223dcdaca749758d274d52 (diff) | |
| download | gem5-35fa5074aa256880f70591eb656dceeb1a7feae0.tar.xz | |
X86: Ensure that the CPUID instruction always writes its outputs.
The CPUID instruction was implemented so that it would only write its results
if the instruction was successful. This works fine on the simple CPU where
unwritten registers retain their old values, but on a CPU like O3 with
renaming this is broken. The instruction needs to write the old values back
into the registers explicitly if they aren't being changed.
Diffstat (limited to 'src/arch/x86/tlb.hh')
0 files changed, 0 insertions, 0 deletions