arch: Cleanup unused ISA traits constants

This patch prunes unused values, and also unifies how the values are
defined (not using an enum for ALPHA), aligning the use of int vs Addr
etc.

The patch also removes the duplication of PageBytes/PageShift and
VMPageSize/LogVMPageSize. For all ISAs the two pairs had identical
values and the latter has been removed.

14 files changed, 31 insertions, 85 deletions

diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 41b63ec5a..f1c39cb05 100644
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -109,19 +109,7 @@ enum mode_type
     mode_number             // number of modes
 };
 
-// Constants Related to the number of registers
-
-enum {
-    LogVMPageSize = 13,       // 8K bytes
-    VMPageSize = (1 << LogVMPageSize),
-
-    BranchPredAddrShiftAmt = 2, // instructions are 4-byte aligned
-
-    MachineBytes = 8,
-    WordBytes = 4,
-    HalfwordBytes = 2,
-    ByteBytes = 1
-};
+const int MachineBytes = 8;
 
 // return a no-op instruction... used for instruction fetch faults
 // Alpha UNOP (ldq_u r31,0(r0))
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 8cc83b0fd..f50131be0 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -49,7 +49,7 @@ AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams *params,
     : LiveProcess(params, objFile)
 {
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set up stack.  On Alpha, stack goes below text section.  This
     // code should get moved to some architecture-specific spot.
@@ -83,7 +83,7 @@ AlphaLiveProcess::argsInit(int intSize, int pageSize)
         // seem to be a problem.
         // check out _dl_aux_init() in glibc/elf/dl-support.c for details
         // --Lisa
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes));
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
         auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
         DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
@@ -193,7 +193,7 @@ AlphaLiveProcess::initState()
 
     LiveProcess::initState();
 
-    argsInit(MachineBytes, VMPageSize);
+    argsInit(MachineBytes, PageBytes);
 
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 506c5009c..8be2bf04a 100644
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -51,8 +51,6 @@
 
 namespace LittleEndianGuest {}
 
-#define TARGET_ARM
-
 namespace ArmISA
 {
     using namespace LittleEndianGuest;
@@ -101,16 +99,7 @@ namespace ArmISA
     // return a no-op instruction... used for instruction fetch faults
     const ExtMachInst NoopMachInst = 0x01E320F000ULL;
 
-    const int LogVMPageSize = 12;       // 4K bytes
-    const int VMPageSize = (1 << LogVMPageSize);
-
-    // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
-    const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
-
     const int MachineBytes = 4;
-    const int WordBytes = 4;
-    const int HalfwordBytes = 2;
-    const int ByteBytes = 1;
 
     const uint32_t HighVecs = 0xFFFF0000;
 
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index 175382b43..a08e6ee45 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -74,7 +74,7 @@ ArmLiveProcess32::ArmLiveProcess32(LiveProcessParams *params,
 
     // Set up break point (Top of Heap)
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set up region for mmaps. For now, start at bottom of kuseg space.
     mmap_start = mmap_end = 0x40000000L;
@@ -91,7 +91,7 @@ ArmLiveProcess64::ArmLiveProcess64(LiveProcessParams *params,
 
     // Set up break point (Top of Heap)
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set up region for mmaps. For now, start at bottom of kuseg space.
     mmap_start = mmap_end = 0x4000000000L;
@@ -101,7 +101,7 @@ void
 ArmLiveProcess32::initState()
 {
     LiveProcess::initState();
-    argsInit<uint32_t>(VMPageSize, INTREG_SP);
+    argsInit<uint32_t>(PageBytes, INTREG_SP);
     for (int i = 0; i < contextIds.size(); i++) {
         ThreadContext * tc = system->getThreadContext(contextIds[i]);
         CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
@@ -120,7 +120,7 @@ void
 ArmLiveProcess64::initState()
 {
     LiveProcess::initState();
-    argsInit<uint64_t>(VMPageSize, INTREG_SP0);
+    argsInit<uint64_t>(PageBytes, INTREG_SP0);
     for (int i = 0; i < contextIds.size(); i++) {
         ThreadContext * tc = system->getThreadContext(contextIds[i]);
         CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
@@ -203,7 +203,7 @@ ArmLiveProcess::argsInit(int pageSize, IntRegIndex spIndex)
         //XXX Figure out what these should be
         auxv.push_back(auxv_t(M5_AT_HWCAP, features));
         //The system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::PageBytes));
         //Frequency at which times() increments
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
         // For statically linked executables, this is the virtual address of the
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index ae84391e9..b0eec495c 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -85,6 +85,7 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
         }
     } else {
         if (size == (uint16_t)(-1))
+            // todo: should this not be sizeof(uint32_t) rather?
             size = ArmISA::MachineBytes;
 
         if (number < NumArgumentRegs) {
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index af99461c9..ca375f2e8 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -145,16 +145,6 @@ enum mode_type
 // return a no-op instruction... used for instruction fetch faults
 const ExtMachInst NoopMachInst = 0x00000000;
 
-const int LogVMPageSize = 13;       // 8K bytes
-const int VMPageSize = (1 << LogVMPageSize);
-
-const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
-
-const int MachineBytes = 4;
-const int WordBytes = 4;
-const int HalfwordBytes = 2;
-const int ByteBytes = 1;
-
 const int ANNOTE_NONE = 0;
 const uint32_t ITOUCH_ANNOTE = 0xffffffff;
 
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index f84c5cc4a..404c84da6 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -58,7 +58,7 @@ MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
 
     // Set up break point (Top of Heap)
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set up region for mmaps.  Start it 1GB above the top of the heap.
     mmap_start = mmap_end = brk_point + 0x40000000L;
@@ -69,7 +69,7 @@ MipsLiveProcess::initState()
 {
     LiveProcess::initState();
 
-    argsInit<uint32_t>(VMPageSize);
+    argsInit<uint32_t>(PageBytes);
 }
 
 template<class IntType>
@@ -88,7 +88,7 @@ MipsLiveProcess::argsInit(int pageSize)
     if (elfObject)
     {
         // Set the system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes));
         // Set the frequency at which time() increments
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
         // For statically linked executables, this is the virtual
diff --git a/src/arch/null/isa_traits.hh b/src/arch/null/isa_traits.hh
index d09b1e876..8c45dd06b 100644
--- a/src/arch/null/isa_traits.hh
+++ b/src/arch/null/isa_traits.hh
@@ -51,9 +51,6 @@ namespace NullISA
     const Addr PageShift = 12;
     const Addr PageBytes = ULL(1) << PageShift;
 
-    const int LogVMPageSize = 12;       // 4K bytes
-    const int VMPageSize = (1 << LogVMPageSize);
-
 }
 
 #endif //__ARCH_NULL_ISA_TRAITS_HH__
diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 393073bf7..3abc831ff 100644
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -61,9 +61,6 @@ const Addr NPtePageShift = PageShift - PteShift;
 const Addr NPtePage = ULL(1) << NPtePageShift;
 const Addr PteMask = NPtePage - 1;
 
-const int LogVMPageSize = 12;  // 4K bytes
-const int VMPageSize = (1 << LogVMPageSize);
-
 const int MachineBytes = 4;
 
 // This is ori 0, 0, 0
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index 175a84f6b..3dc2c0d17 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -56,7 +56,7 @@ PowerLiveProcess::PowerLiveProcess(LiveProcessParams *params,
 
     // Set up break point (Top of Heap)
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set up region for mmaps. For now, start at bottom of kuseg space.
     mmap_start = mmap_end = 0x70000000L;
@@ -67,7 +67,7 @@ PowerLiveProcess::initState()
 {
     Process::initState();
 
-    argsInit(MachineBytes, VMPageSize);
+    argsInit(MachineBytes, PageBytes);
 }
 
 void
@@ -98,7 +98,7 @@ PowerLiveProcess::argsInit(int intSize, int pageSize)
         //XXX Figure out what these should be
         auxv.push_back(auxv_t(M5_AT_HWCAP, features));
         //The system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, PowerISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, PowerISA::PageBytes));
         //Frequency at which times() increments
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
         // For statically linked executables, this is the virtual address of the
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 22d49b12e..b9253863e 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -41,8 +41,6 @@ namespace BigEndianGuest {}
 
 namespace SparcISA
 {
-const int MachineBytes = 8;
-
 // This makes sure the big endian versions of certain functions are used.
 using namespace BigEndianGuest;
 
@@ -52,21 +50,13 @@ using namespace BigEndianGuest;
 // SPARC NOP (sethi %(hi(0), g0)
 const MachInst NoopMachInst = 0x01000000;
 
-// 8K. This value is implmentation specific; and should probably
-// be somewhere else.
-const int LogVMPageSize = 13;
-const int VMPageSize = (1 << LogVMPageSize);
-
 // real address virtual mapping
 // sort of like alpha super page, but less frequently used
 const Addr SegKPMEnd  = ULL(0xfffffffc00000000);
 const Addr SegKPMBase = ULL(0xfffffac000000000);
 
-// Why does both the previous set of constants and this one exist?
-const int PageShift = 13;
-const int PageBytes = 1ULL << PageShift;
-
-const int BranchPredAddrShiftAmt = 2;
+const Addr PageShift = 13;
+const Addr PageBytes = ULL(1) << PageShift;
 
 StaticInstPtr decodeInst(ExtMachInst);
 
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 06b0d18b3..8c8be65ab 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -57,7 +57,7 @@ SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
 
     // XXX all the below need to be updated for SPARC - Ali
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 
     // Set pointer for next thread stack.  Reserve 8M for main stack.
     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
@@ -166,7 +166,7 @@ Sparc32LiveProcess::initState()
     pstate.am = 1;
     tc->setMiscReg(MISCREG_PSTATE, pstate);
 
-    argsInit(32 / 8, VMPageSize);
+    argsInit(32 / 8, PageBytes);
 }
 
 void
@@ -180,7 +180,7 @@ Sparc64LiveProcess::initState()
     pstate.ie = 1;
     tc->setMiscReg(MISCREG_PSTATE, pstate);
 
-    argsInit(sizeof(IntReg), VMPageSize);
+    argsInit(sizeof(IntReg), PageBytes);
 }
 
 template<class IntType>
@@ -234,7 +234,7 @@ SparcLiveProcess::argsInit(int pageSize)
         // Bits which describe the system hardware capabilities
         auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
         // The system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::PageBytes));
         // Defined to be 100 in the kernel source.
         // Frequency at which times() increments
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 27f20e9b2..a9e274ecc 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -59,14 +59,8 @@ namespace X86ISA
     //XXX This needs to be set to an intermediate instruction struct
     //which encodes this instruction
 
-    //4k. This value is not constant on x86.
-    const int LogVMPageSize = 12;
-    const int VMPageSize = (1 << LogVMPageSize);
-
-    const int PageShift = 12;
-    const int PageBytes = 1ULL << PageShift;
-
-    const int BranchPredAddrShiftAmt = 0;
+    const Addr PageShift = 12;
+    const Addr PageBytes = ULL(1) << PageShift;
 
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 95a7f9998..fc5a88888 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -86,7 +86,7 @@ X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
     numSyscallDescs(_numSyscallDescs)
 {
     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
-    brk_point = roundUp(brk_point, VMPageSize);
+    brk_point = roundUp(brk_point, PageBytes);
 }
 
 X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
@@ -96,7 +96,7 @@ X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
 {
 
     vsyscallPage.base = 0xffffffffff600000ULL;
-    vsyscallPage.size = VMPageSize;
+    vsyscallPage.size = PageBytes;
     vsyscallPage.vtimeOffset = 0x400;
     vsyscallPage.vgettimeofdayOffset = 0x0;
 
@@ -133,10 +133,10 @@ I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
     X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
 {
     _gdtStart = ULL(0xffffd000);
-    _gdtSize = VMPageSize;
+    _gdtSize = PageBytes;
 
     vsyscallPage.base = 0xffffe000ULL;
-    vsyscallPage.size = VMPageSize;
+    vsyscallPage.size = PageBytes;
     vsyscallPage.vsyscallOffset = 0x400;
     vsyscallPage.vsysexitOffset = 0x410;
 
@@ -163,7 +163,7 @@ X86_64LiveProcess::initState()
 {
     X86LiveProcess::initState();
 
-    argsInit(sizeof(uint64_t), VMPageSize);
+    argsInit(sizeof(uint64_t), PageBytes);
 
        // Set up the vsyscall page for this process.
     allocateMem(vsyscallPage.base, vsyscallPage.size);
@@ -258,7 +258,7 @@ I386LiveProcess::initState()
 {
     X86LiveProcess::initState();
 
-    argsInit(sizeof(uint32_t), VMPageSize);
+    argsInit(sizeof(uint32_t), PageBytes);
 
     /* 
      * Set up a GDT for this process. The whole GDT wouldn't really be for
@@ -474,7 +474,7 @@ X86LiveProcess::argsInit(int pageSize,
         //XXX Figure out what these should be
         auxv.push_back(auxv_t(M5_AT_HWCAP, features));
         //The system page size
-        auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
+        auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::PageBytes));
         //Frequency at which times() increments
         //Defined to be 100 in the kernel source.
         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));