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author | Jose Marinho <jose.marinho@arm.com> | 2017-10-19 18:45:26 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-11-20 17:34:49 +0000 |
commit | 7bd68dbc368e2d877f6159f5d0039198983e459a (patch) | |
tree | 520b10f7f9f5c9eb1e912f29bacf1a10bcff87d5 /src/cpu/BaseCPU.py | |
parent | c0d613adb4eca09c32aca1cc90f04c29574f69c6 (diff) | |
download | gem5-7bd68dbc368e2d877f6159f5d0039198983e459a.tar.xz |
cpu: Make automatic transition to OFF optional
Add the power_gating_on_idle option to control whether a core
automatically enters the power gated state. The default behaviour is
to transition to clock gated when idle, but not to power gated. When
this option is set to true, the core automatically transitions to the
power gated state after a configurable latency.
Change-Id: Ida98c7fc532de4140d0e511c25613769b47b3702
Reviewed-on: https://gem5-review.googlesource.com/5741
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/BaseCPU.py')
-rw-r--r-- | src/cpu/BaseCPU.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index 0e131ae0a..1bf2c1e35 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -138,6 +138,10 @@ class BaseCPU(MemObject): pwr_gating_latency = Param.Cycles(300, "Latency to enter power gating state when all contexts are suspended") + power_gating_on_idle = Param.Bool(False, "Control whether the core goes "\ + "to the OFF power state after all thread are disabled for "\ + "pwr_gating_latency cycles") + function_trace = Param.Bool(False, "Enable function trace") function_trace_start = Param.Tick(0, "Tick to start function trace") |