diff options
author | Radhika Jagtap <radhika.jagtap@ARM.com> | 2015-12-07 16:42:16 -0600 |
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committer | Radhika Jagtap <radhika.jagtap@ARM.com> | 2015-12-07 16:42:16 -0600 |
commit | 54519fd51f739c3a37c4ad712b86a353eabbbfec (patch) | |
tree | 21002ebffe820d302b839ac625636830b141964b /src/cpu/o3/probe/elastic_trace.hh | |
parent | 3080bbcc365e6ed663787a4c06cd2b7c4a118d47 (diff) | |
download | gem5-54519fd51f739c3a37c4ad712b86a353eabbbfec.tar.xz |
cpu: Support virtual addr in elastic traces
This patch adds support to optionally capture the virtual address and asid
for load/store instructions in the elastic traces. If they are present in
the traces, Trace CPU will set those fields of the request during replay.
Diffstat (limited to 'src/cpu/o3/probe/elastic_trace.hh')
-rw-r--r-- | src/cpu/o3/probe/elastic_trace.hh | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/cpu/o3/probe/elastic_trace.hh b/src/cpu/o3/probe/elastic_trace.hh index 001dc0e13..584cdf182 100644 --- a/src/cpu/o3/probe/elastic_trace.hh +++ b/src/cpu/o3/probe/elastic_trace.hh @@ -289,8 +289,12 @@ class ElasticTrace : public ProbeListenerObject Addr pc; /* Request flags in case of a load/store instruction */ Request::FlagsType reqFlags; - /* Request address in case of a load/store instruction */ - Addr addr; + /* Request physical address in case of a load/store instruction */ + Addr physAddr; + /* Request virtual address in case of a load/store instruction */ + Addr virtAddr; + /* Address space id in case of a load/store instruction */ + uint32_t asid; /* Request size in case of a load/store instruction */ unsigned size; /** Default Constructor */ @@ -366,6 +370,9 @@ class ElasticTrace : public ProbeListenerObject */ bool allProbesReg; + /** Whether to trace virtual addresses for memory requests. */ + const bool traceVirtAddr; + /** Pointer to the O3CPU that is this listener's parent a.k.a. manager */ FullO3CPU<O3CPUImpl>* cpu; |