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author | Gabe Black <gblack@eecs.umich.edu> | 2010-09-14 00:29:38 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-09-14 00:29:38 -0700 |
commit | 0dd1f7f01a8a744811aede5814111b8681271a6b (patch) | |
tree | 8d6f8936821696b19135495db72ffee29dac490e /src/cpu/thread_context.hh | |
parent | 8f3fbd2d13dbfc3699dc43b27b3c2a389049078d (diff) | |
download | gem5-0dd1f7f01a8a744811aede5814111b8681271a6b.tar.xz |
CPU: Trim unnecessary includes from some common files.
This reduces the scope of those includes and makes it less likely for there to
be a dependency loop. This also moves the hashing functions associated with
ExtMachInst objects to be with the ExtMachInst definitions and out of
utility.hh.
Diffstat (limited to 'src/cpu/thread_context.hh')
-rw-r--r-- | src/cpu/thread_context.hh | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index 3d7be5256..753fa2146 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -31,12 +31,14 @@ #ifndef __CPU_THREAD_CONTEXT_HH__ #define __CPU_THREAD_CONTEXT_HH__ +#include <string> +#include <iostream> + #include "arch/registers.hh" #include "arch/types.hh" #include "base/types.hh" #include "config/full_system.hh" #include "config/the_isa.hh" -#include "sim/serialize.hh" // @todo: Figure out a more architecture independent way to obtain the ITB and // DTB pointers. @@ -45,8 +47,8 @@ namespace TheISA class TLB; } class BaseCPU; +class Checkpoint; class EndQuiesceEvent; -class Event; class TranslatingPort; class FunctionalPort; class VirtualPort; |