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author | Andreas Hansson <andreas.hansson@arm.com> | 2015-03-27 04:55:55 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-03-27 04:55:55 -0400 |
commit | 7bae98459cc442f0c22d4eeac5901b61ea39c801 (patch) | |
tree | 112d5d799c511fa5b4306d08d73ad7012d0aef9b /src/mem/cache/base.hh | |
parent | 15f0d9ff1441886eb6431544d9d3571f56a14840 (diff) | |
download | gem5-7bae98459cc442f0c22d4eeac5901b61ea39c801.tar.xz |
mem: Align all MSHR entries to block boundaries
This patch aligns all MSHR queue entries to block boundaries to
simplify checks for matches. Previously there were corner cases that
could lead to existing entries not being identified as matches.
There are, rather alarmingly, a few regressions that change with this
patch.
Diffstat (limited to 'src/mem/cache/base.hh')
-rw-r--r-- | src/mem/cache/base.hh | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index cd2f55246..16160dba3 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -217,6 +217,11 @@ class BaseCache : public MemObject MSHR *allocateBufferInternal(MSHRQueue *mq, Addr addr, int size, PacketPtr pkt, Tick time, bool requestBus) { + // check that the address is block aligned since we rely on + // this in a number of places when checking for matches and + // overlap + assert(addr == blockAlign(addr)); + MSHR *mshr = mq->allocate(addr, size, pkt, time, order++); if (mq->isFull()) { @@ -506,7 +511,7 @@ class BaseCache : public MemObject { assert(pkt->isWrite() && !pkt->isRead()); return allocateBufferInternal(&writeBuffer, - pkt->getAddr(), pkt->getSize(), + blockAlign(pkt->getAddr()), blkSize, pkt, time, requestBus); } @@ -515,7 +520,7 @@ class BaseCache : public MemObject assert(pkt->req->isUncacheable()); assert(pkt->isRead()); return allocateBufferInternal(&mshrQueue, - pkt->getAddr(), pkt->getSize(), + blockAlign(pkt->getAddr()), blkSize, pkt, time, requestBus); } |