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author | Andreas Hansson <andreas.hansson@arm.com> | 2015-12-31 09:32:58 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-12-31 09:32:58 -0500 |
commit | 0fcb376e5fc6bc0a7b16dc4595d4a7e3f910cbc8 (patch) | |
tree | 4be665e3596d9d4e193e6354c5577ee0077732da /src/mem/comm_monitor.cc | |
parent | a3177645773b8eb4b835050c395554d3e2b4664a (diff) | |
download | gem5-0fcb376e5fc6bc0a7b16dc4595d4a7e3f910cbc8.tar.xz |
mem: Make cache terminology easier to understand
This patch changes the name of a bunch of packet flags and MSHR member
functions and variables to make the coherency protocol easier to
understand. In addition the patch adds and updates lots of
descriptions, explicitly spelling out assumptions.
The following name changes are made:
* the packet memInhibit flag is renamed to cacheResponding
* the packet sharedAsserted flag is renamed to hasSharers
* the packet NeedsExclusive attribute is renamed to NeedsWritable
* the packet isSupplyExclusive is renamed responderHadWritable
* the MSHR pendingDirty is renamed to pendingModified
The cache states, Modified, Owned, Exclusive, Shared are also called
out in the cache and MSHR code to make it easier to understand.
Diffstat (limited to 'src/mem/comm_monitor.cc')
-rw-r--r-- | src/mem/comm_monitor.cc | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc index fa1950be3..6077d2951 100644 --- a/src/mem/comm_monitor.cc +++ b/src/mem/comm_monitor.cc @@ -144,18 +144,17 @@ CommMonitor::recvTimingReq(PacketPtr pkt) const bool is_read = pkt->isRead(); const bool is_write = pkt->isWrite(); const bool expects_response( - pkt->needsResponse() && !pkt->memInhibitAsserted()); + pkt->needsResponse() && !pkt->cacheResponding()); // If a cache miss is served by a cache, a monitor near the memory // would see a request which needs a response, but this response - // would be inhibited and not come back from the memory. Therefore - // we additionally have to check the inhibit flag. + // would not come back from the memory. Therefore we additionally + // have to check the cacheResponding flag if (expects_response && !stats.disableLatencyHists) { pkt->pushSenderState(new CommMonitorSenderState(curTick())); } - // Attempt to send the packet (always succeeds for inhibited - // packets) + // Attempt to send the packet bool successful = masterPort.sendTimingReq(pkt); // If not successful, restore the sender state |