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author | Gabe Black <gabeblack@google.com> | 2018-05-24 01:37:55 -0700 |
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committer | Gabe Black <gabeblack@google.com> | 2018-08-08 10:09:54 +0000 |
commit | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (patch) | |
tree | 7b6faaacb4574a555e561534aa4a8508c0624c32 /src/systemc/tests/systemc/kernel/reset_signal_is/test02 | |
parent | 7235d3b5211d0ba8f528d930a4c1e7ad62eec51a (diff) | |
download | gem5-16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f.tar.xz |
systemc: Import tests from the Accellera systemc distribution.
Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6
Reviewed-on: https://gem5-review.googlesource.com/10845
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/systemc/tests/systemc/kernel/reset_signal_is/test02')
-rw-r--r-- | src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log | 10 | ||||
-rw-r--r-- | src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp | 84 |
2 files changed, 94 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log new file mode 100644 index 000000000..4d9276f04 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log @@ -0,0 +1,10 @@ +SystemC Simulation +0 s: initializing +3 ns: waited 3 +4 ns: initializing +7 ns: waited 3 +10 ns: waited 3 +12 ns: initializing +15 ns: initializing + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp new file mode 100644 index 000000000..2fc27a1f7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test reset_signal_is() usage with SC_CTHREAD processes. + + Original Author: Andy Goodrich, Forte Design Systems, 12 August 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + reset_signal_is(m_reset,true); + SC_CTHREAD(resetter,m_clk.pos()); + } + void cthread() + { + cout << sc_time_stamp() << ": initializing" << endl; + for (;;) + { + wait(3); + cout << sc_time_stamp() << ": waited 3" << endl; + } + } + void resetter() + { + m_reset = false; + wait(3); + m_reset = true; + wait(2); + m_reset = false; + wait(6); + m_reset = true; + wait(5); + sc_stop(); + } + sc_in<bool> m_clk; + sc_inout<bool> m_reset; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal<bool> reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + sc_start(); + return 0; +} + |