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author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt | |
parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz |
Stats: Re update stats.
Diffstat (limited to 'tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt')
-rw-r--r-- | tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt index aaad6352f..025b36e9a 100644 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 148199 # Simulator instruction rate (inst/s) -host_mem_usage 206348 # Number of bytes of host memory used -host_seconds 11714.26 # Real time elapsed on the host -host_tick_rate 61804258 # Simulator tick rate (ticks/s) +host_inst_rate 163492 # Simulator instruction rate (inst/s) +host_mem_usage 226772 # Number of bytes of host memory used +host_seconds 10618.50 # Real time elapsed on the host +host_tick_rate 68182084 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1736043781 # Number of instructions simulated sim_seconds 0.723991 # Number of seconds simulated @@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle::total 1347786892 # Number of insts commited each cycle system.cpu.commit.COM:count 1819780126 # Number of instructions committed +system.cpu.commit.COM:fp_insts 805525 # Number of committed floating point instructions. +system.cpu.commit.COM:function_calls 16767440 # Number of function calls committed. +system.cpu.commit.COM:int_insts 1718967519 # Number of committed integer instructions. system.cpu.commit.COM:loads 444595663 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed system.cpu.commit.COM:refs 605324165 # Number of memory references committed @@ -179,6 +182,8 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::total 1436774330 # Number of instructions fetched each cycle (Total) +system.cpu.fp_regfile_reads 752 # number of floating regfile reads +system.cpu.fp_regfile_writes 445 # number of floating regfile writes system.cpu.icache.ReadReq_accesses 354412327 # number of ReadReq accesses(hits+misses) system.cpu.icache.ReadReq_avg_miss_latency 35305.051302 # average ReadReq miss latency system.cpu.icache.ReadReq_avg_mshr_miss_latency 35462.540717 # average ReadReq mshr miss latency @@ -278,6 +283,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 71840083 # system.cpu.iew.memOrderViolationEvents 2851639 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 3390000 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 18332236 # Number of branches that were predicted taken incorrectly +system.cpu.int_regfile_reads 3052206207 # number of integer regfile reads +system.cpu.int_regfile_writes 1779704780 # number of integer regfile writes system.cpu.ipc 1.198940 # IPC: Instructions Per Cycle system.cpu.ipc_total 1.198940 # IPC: Total IPC of All Threads system.cpu.iq.ISSUE:FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued @@ -369,6 +376,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle system.cpu.iq.ISSUE:issued_per_cycle::total 1436774330 # Number of insts issued each cycle system.cpu.iq.ISSUE:rate 1.592073 # Inst issue rate +system.cpu.iq.fp_alu_accesses 831640 # Number of floating point alu accesses +system.cpu.iq.fp_inst_queue_reads 1663270 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_wakeup_accesses 822278 # Number of floating instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_writes 878238 # Number of floating instruction queue writes +system.cpu.iq.int_alu_accesses 2317801511 # Number of integer alu accesses +system.cpu.iq.int_inst_queue_reads 6060328576 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_wakeup_accesses 2227662406 # Number of integer instruction queue wakeup accesses +system.cpu.iq.int_inst_queue_writes 3193875126 # Number of integer instruction queue writes system.cpu.iq.iqInstsAdded 2474285485 # Number of instructions added to the IQ (excludes non-spec) system.cpu.iq.iqInstsIssued 2305294087 # Number of instructions issued system.cpu.iq.iqNonSpecInstsAdded 45 # Number of non-speculative instructions added to the IQ @@ -465,7 +480,11 @@ system.cpu.memDep0.conflictingLoads 123159990 # Nu system.cpu.memDep0.conflictingStores 64312407 # Number of conflicting stores. system.cpu.memDep0.insertedLoads 617102957 # Number of loads inserted to the mem dependence unit. system.cpu.memDep0.insertedStores 232568585 # Number of stores inserted to the mem dependence unit. +system.cpu.misc_regfile_reads 25 # number of misc regfile reads +system.cpu.misc_regfile_writes 1 # number of misc regfile writes system.cpu.numCycles 1447982395 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.rename.RENAME:BlockCycles 51393371 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 1376202963 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 5887635 # Number of times rename has blocked due to IQ full @@ -479,10 +498,14 @@ system.cpu.rename.RENAME:RunCycles 528076479 # Nu system.cpu.rename.RENAME:SquashCycles 88987438 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 27475071 # Number of cycles rename is unblocking system.cpu.rename.RENAME:UndoneMaps 671478700 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:fp_rename_lookups 885045 # Number of floating rename lookups +system.cpu.rename.RENAME:int_rename_lookups 3534388873 # Number of integer rename lookups system.cpu.rename.RENAME:serializeStallCycles 849 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 49 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 54007891 # count of insts added to the skid buffer system.cpu.rename.RENAME:tempSerializingInsts 47 # count of temporary serializing insts renamed +system.cpu.rob.rob_reads 3612840225 # The number of ROB reads +system.cpu.rob.rob_writes 4916793262 # The number of ROB writes system.cpu.timesIdled 425188 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu.workload.PROG:num_syscalls 29 # Number of system calls |