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author | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-02-07 19:23:13 -0800 |
commit | 0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch) | |
tree | 96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt | |
parent | 1b64bfa933745294667158d0ce22180780b2a22e (diff) | |
download | gem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz |
Stats: Re update stats.
Diffstat (limited to 'tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt')
-rw-r--r-- | tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt index a6694501e..d5304c4b4 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1101929 # Simulator instruction rate (inst/s) -host_mem_usage 183300 # Number of bytes of host memory used -host_seconds 0.01 # Real time elapsed on the host -host_tick_rate 525428314 # Simulator tick rate (ticks/s) +host_inst_rate 106820 # Simulator instruction rate (inst/s) +host_mem_usage 216064 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host +host_tick_rate 53148750 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 5827 # Number of instructions simulated sim_seconds 0.000003 # Number of seconds simulated @@ -29,8 +29,24 @@ system.cpu.itb.write_hits 0 # DT system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 5828 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 5828 # Number of busy cycles +system.cpu.num_conditional_control_insts 677 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses +system.cpu.num_fp_insts 2 # number of float instructions +system.cpu.num_fp_register_reads 3 # number of times the floating registers were read +system.cpu.num_fp_register_writes 1 # number of times the floating registers were written +system.cpu.num_func_calls 194 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 5827 # Number of instructions executed -system.cpu.num_refs 2090 # Number of memory references +system.cpu.num_int_alu_accesses 5126 # Number of integer alu accesses +system.cpu.num_int_insts 5126 # number of integer instructions +system.cpu.num_int_register_reads 7301 # number of times the integer registers were read +system.cpu.num_int_register_writes 3409 # number of times the integer registers were written +system.cpu.num_load_insts 1164 # Number of load instructions +system.cpu.num_mem_refs 2090 # number of memory refs +system.cpu.num_store_insts 926 # Number of store instructions system.cpu.workload.PROG:num_syscalls 8 # Number of system calls ---------- End Simulation Statistics ---------- |