diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2011-09-17 12:34:03 -0400 |
---|---|---|
committer | Ali Saidi <saidi@eecs.umich.edu> | 2011-09-17 12:34:03 -0400 |
commit | ae62d97158c0908fca576a8c474ef8810e1d0420 (patch) | |
tree | 70c4999508c7fa409bdd950393602b996ac7c858 /tests/quick/00.hello/ref/mips/linux | |
parent | 6caea472a9c192e38ad5057dc0053c72786f8584 (diff) | |
download | gem5-ae62d97158c0908fca576a8c474ef8810e1d0420.tar.xz |
MIPS: Fix regressions tests
Diffstat (limited to 'tests/quick/00.hello/ref/mips/linux')
15 files changed, 46 insertions, 46 deletions
diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini index 44cfcef80..f9f4647e1 100644 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini @@ -205,7 +205,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/test-progs/hello/bin/mips/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout b/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout index 1aed5d989..86af758df 100755 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 13 2011 11:17:24 -gem5 started Sep 13 2011 11:17:29 -gem5 executing on u200439-lin.austin.arm.com +gem5 compiled Sep 17 2011 12:31:33 +gem5 started Sep 17 2011 12:31:39 +gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/inorder-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/inorder-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt index dc1cbf29f..844338a8e 100644 --- a/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000020 # Number of seconds simulated sim_ticks 19785000 # Number of ticks simulated sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4508 # Simulator instruction rate (inst/s) -host_tick_rate 15307212 # Simulator tick rate (ticks/s) -host_mem_usage 249516 # Number of bytes of host memory used -host_seconds 1.29 # Real time elapsed on the host +host_inst_rate 1139 # Simulator instruction rate (inst/s) +host_tick_rate 3867528 # Simulator tick rate (ticks/s) +host_mem_usage 204696 # Number of bytes of host memory used +host_seconds 5.12 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini index d39ff7633..6a2ff3124 100644 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini @@ -500,7 +500,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/test-progs/hello/bin/mips/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/simout b/tests/quick/00.hello/ref/mips/linux/o3-timing/simout index 70bb08b97..1b7f6128f 100755 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 13 2011 11:17:24 -gem5 started Sep 13 2011 11:17:29 -gem5 executing on u200439-lin.austin.arm.com +gem5 compiled Sep 17 2011 12:31:33 +gem5 started Sep 17 2011 12:31:39 +gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/o3-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt index d3b5afd1a..3721e6673 100644 --- a/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000012 # Number of seconds simulated sim_ticks 12272500 # Number of ticks simulated sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4036 # Simulator instruction rate (inst/s) -host_tick_rate 9581124 # Simulator tick rate (ticks/s) -host_mem_usage 250068 # Number of bytes of host memory used -host_seconds 1.28 # Real time elapsed on the host +host_inst_rate 1003 # Simulator instruction rate (inst/s) +host_tick_rate 2382032 # Simulator tick rate (ticks/s) +host_mem_usage 205244 # Number of bytes of host memory used +host_seconds 5.15 # Real time elapsed on the host sim_insts 5169 # Number of instructions simulated system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses @@ -86,9 +86,9 @@ system.cpu.rename.UnblockCycles 111 # Nu system.cpu.rename.RenamedInsts 11004 # Number of instructions processed by rename system.cpu.rename.LSQFullEvents 101 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 6697 # Number of destination operands rename has renamed -system.cpu.rename.RenameLookups 13110 # Number of register rename lookups that rename has made +system.cpu.rename.RenameLookups 13109 # Number of register rename lookups that rename has made system.cpu.rename.int_rename_lookups 13105 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 5 # Number of floating rename lookups +system.cpu.rename.fp_rename_lookups 4 # Number of floating rename lookups system.cpu.rename.CommittedMaps 3410 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 3287 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 18 # count of serializing insts renamed @@ -290,7 +290,7 @@ system.cpu.int_regfile_reads 10280 # nu system.cpu.int_regfile_writes 4987 # number of integer regfile writes system.cpu.fp_regfile_reads 3 # number of floating regfile reads system.cpu.fp_regfile_writes 1 # number of floating regfile writes -system.cpu.misc_regfile_reads 154 # number of misc regfile reads +system.cpu.misc_regfile_reads 153 # number of misc regfile reads system.cpu.icache.replacements 17 # number of replacements system.cpu.icache.tagsinuse 161.224498 # Cycle average of tags in use system.cpu.icache.total_refs 1363 # Total number of references to valid blocks. diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini index 4d964406e..fda15903b 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini @@ -67,7 +67,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/test-progs/hello/bin/mips/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout b/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout index 9509c6985..9eba211ea 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 13 2011 11:17:24 -gem5 started Sep 13 2011 11:17:29 -gem5 executing on u200439-lin.austin.arm.com +gem5 compiled Sep 17 2011 12:31:33 +gem5 started Sep 17 2011 12:31:39 +gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-atomic -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt index 462a34e56..6bf960444 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000003 # Number of seconds simulated sim_ticks 2913500 # Number of ticks simulated sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4455 # Simulator instruction rate (inst/s) -host_tick_rate 2227266 # Simulator tick rate (ticks/s) -host_mem_usage 240420 # Number of bytes of host memory used -host_seconds 1.31 # Real time elapsed on the host +host_inst_rate 1129 # Simulator instruction rate (inst/s) +host_tick_rate 564724 # Simulator tick rate (ticks/s) +host_mem_usage 195504 # Number of bytes of host memory used +host_seconds 5.16 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses @@ -37,7 +37,7 @@ system.cpu.num_func_calls 194 # nu system.cpu.num_conditional_control_insts 677 # number of instructions that are conditional controls system.cpu.num_int_insts 5126 # number of integer instructions system.cpu.num_fp_insts 2 # number of float instructions -system.cpu.num_int_register_reads 7301 # number of times the integer registers were read +system.cpu.num_int_register_reads 7300 # number of times the integer registers were read system.cpu.num_int_register_writes 3409 # number of times the integer registers were written system.cpu.num_fp_register_reads 3 # number of times the floating registers were read system.cpu.num_fp_register_writes 1 # number of times the floating registers were written diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini index 8c0fe7266..41938cc87 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini @@ -64,7 +64,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/test-progs/hello/bin/mips/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout index fc1b9eeff..b0d2d6b62 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 13 2011 11:17:24 -gem5 started Sep 13 2011 11:17:29 -gem5 executing on u200439-lin.austin.arm.com +gem5 compiled Sep 17 2011 12:31:33 +gem5 started Sep 17 2011 12:31:39 +gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing-ruby -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt index 1ded2ae9a..fe1143095 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000293 # Number of seconds simulated sim_ticks 292960 # Number of ticks simulated sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 9604 # Simulator instruction rate (inst/s) -host_tick_rate 482836 # Simulator tick rate (ticks/s) -host_mem_usage 258552 # Number of bytes of host memory used -host_seconds 0.61 # Real time elapsed on the host +host_inst_rate 1124 # Simulator instruction rate (inst/s) +host_tick_rate 56528 # Simulator tick rate (ticks/s) +host_mem_usage 213468 # Number of bytes of host memory used +host_seconds 5.18 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses @@ -37,7 +37,7 @@ system.cpu.num_func_calls 194 # nu system.cpu.num_conditional_control_insts 677 # number of instructions that are conditional controls system.cpu.num_int_insts 5126 # number of integer instructions system.cpu.num_fp_insts 2 # number of float instructions -system.cpu.num_int_register_reads 7301 # number of times the integer registers were read +system.cpu.num_int_register_reads 7300 # number of times the integer registers were read system.cpu.num_int_register_writes 3409 # number of times the integer registers were written system.cpu.num_fp_register_reads 3 # number of times the floating registers were read system.cpu.num_fp_register_writes 1 # number of times the floating registers were written diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini index 4ab4dac25..383b176d8 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini @@ -170,7 +170,7 @@ egid=100 env= errout=cerr euid=100 -executable=/chips/pd/randd/dist/test-progs/hello/bin/mips/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout index 80781ba32..09aaf2152 100755 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/simout +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 13 2011 11:17:24 -gem5 started Sep 13 2011 11:17:29 -gem5 executing on u200439-lin.austin.arm.com +gem5 compiled Sep 17 2011 12:31:33 +gem5 started Sep 17 2011 12:31:39 +gem5 executing on zizzer command line: build/MIPS_SE/gem5.opt -d build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing -re tests/run.py build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt index 8e7fe8774..0e8242f31 100644 --- a/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt +++ b/tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000032 # Number of seconds simulated sim_ticks 32088000 # Number of ticks simulated sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4536 # Simulator instruction rate (inst/s) -host_tick_rate 24978496 # Simulator tick rate (ticks/s) -host_mem_usage 249136 # Number of bytes of host memory used -host_seconds 1.29 # Real time elapsed on the host +host_inst_rate 1128 # Simulator instruction rate (inst/s) +host_tick_rate 6214306 # Simulator tick rate (ticks/s) +host_mem_usage 204312 # Number of bytes of host memory used +host_seconds 5.16 # Real time elapsed on the host sim_insts 5827 # Number of instructions simulated system.cpu.dtb.read_hits 0 # DTB read hits system.cpu.dtb.read_misses 0 # DTB read misses @@ -37,7 +37,7 @@ system.cpu.num_func_calls 194 # nu system.cpu.num_conditional_control_insts 677 # number of instructions that are conditional controls system.cpu.num_int_insts 5126 # number of integer instructions system.cpu.num_fp_insts 2 # number of float instructions -system.cpu.num_int_register_reads 7301 # number of times the integer registers were read +system.cpu.num_int_register_reads 7300 # number of times the integer registers were read system.cpu.num_int_register_writes 3409 # number of times the integer registers were written system.cpu.num_fp_register_reads 3 # number of times the floating registers were read system.cpu.num_fp_register_writes 1 # number of times the floating registers were written |