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| author | Steve Reinhardt <stever@gmail.com> | 2010-09-09 14:40:19 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@gmail.com> | 2010-09-09 14:40:19 -0400 |
| commit | 9e45ada1718b6df9310757fdc7cd78db4695516f (patch) | |
| tree | c5cc9f2173f36e38addd8ca08e32ac010e56ef73 /tests/quick/50.memtest/ref/alpha/linux/memtest/simout | |
| parent | 12497284949cb5418e6bc403723c034aee655666 (diff) | |
| download | gem5-9e45ada1718b6df9310757fdc7cd78db4695516f.tar.xz | |
stats: update stats for preceding coherence changes
Because the handling of the E state for multilevel caches
has changed, stats are affected for any non-ruby config
with caches, even uniprocessor simple CPU.
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest/simout')
| -rwxr-xr-x | tests/quick/50.memtest/ref/alpha/linux/memtest/simout | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest/simout b/tests/quick/50.memtest/ref/alpha/linux/memtest/simout index 35f602702..d0c56eeac 100755 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest/simout +++ b/tests/quick/50.memtest/ref/alpha/linux/memtest/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest/simout +Redirecting stderr to build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -5,11 +7,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Aug 20 2010 12:21:09 -M5 revision c4b5df973361+ 7570+ default qtip tip brad/regress_updates -M5 started Aug 20 2010 12:21:31 -M5 executing on SC2B0629 -command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest +M5 compiled Aug 26 2010 11:51:59 +M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix +M5 started Aug 26 2010 11:52:02 +M5 executing on zizzer +command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest -re tests/run.py build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 269223994 because maximum number of loads reached +Exiting @ tick 268782974 because maximum number of loads reached |