diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-03-17 10:32:53 -0700 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-03-17 10:32:53 -0700 |
commit | d7c083864c85c3ab24b40fc85ef3cae8031c5912 (patch) | |
tree | ae575d831de5d67596ca3aae5e87a71f9c9fd1cd /tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt | |
parent | 9b4249410ec18cac9df2c7e9c0a4a6ce5459233d (diff) | |
download | gem5-d7c083864c85c3ab24b40fc85ef3cae8031c5912.tar.xz |
stats: update stats for ld.so support
Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt')
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt | 713 |
1 files changed, 356 insertions, 357 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt index adb01be8a..58f4afdee 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt @@ -1,43 +1,43 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 0.000109 # Number of seconds simulated -sim_ticks 108694 # Number of ticks simulated -final_tick 108694 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_ticks 108878 # Number of ticks simulated +final_tick 108878 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 71872 # Simulator instruction rate (inst/s) -host_op_rate 71865 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1222276 # Simulator tick rate (ticks/s) -host_mem_usage 417856 # Number of bytes of host memory used -host_seconds 0.09 # Real time elapsed on the host -sim_insts 6390 # Number of instructions simulated -sim_ops 6390 # Number of ops (including micro ops) simulated +host_inst_rate 17471 # Simulator instruction rate (inst/s) +host_op_rate 17470 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 297052 # Simulator tick rate (ticks/s) +host_mem_usage 393472 # Number of bytes of host memory used +host_seconds 0.37 # Real time elapsed on the host +sim_insts 6403 # Number of instructions simulated +sim_ops 6403 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks -system.mem_ctrls.bytes_read::ruby.dir_cntrl0 75648 # Number of bytes read from this memory -system.mem_ctrls.bytes_read::total 75648 # Number of bytes read from this memory +system.mem_ctrls.bytes_read::ruby.dir_cntrl0 75712 # Number of bytes read from this memory +system.mem_ctrls.bytes_read::total 75712 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 12416 # Number of bytes written to this memory system.mem_ctrls.bytes_written::total 12416 # Number of bytes written to this memory -system.mem_ctrls.num_reads::ruby.dir_cntrl0 1182 # Number of read requests responded to by this memory -system.mem_ctrls.num_reads::total 1182 # Number of read requests responded to by this memory +system.mem_ctrls.num_reads::ruby.dir_cntrl0 1183 # Number of read requests responded to by this memory +system.mem_ctrls.num_reads::total 1183 # Number of read requests responded to by this memory system.mem_ctrls.num_writes::ruby.dir_cntrl0 194 # Number of write requests responded to by this memory system.mem_ctrls.num_writes::total 194 # Number of write requests responded to by this memory -system.mem_ctrls.bw_read::ruby.dir_cntrl0 695972179 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_read::total 695972179 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::ruby.dir_cntrl0 114228936 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::total 114228936 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_total::ruby.dir_cntrl0 810201115 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.bw_total::total 810201115 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.readReqs 1182 # Number of read requests accepted +system.mem_ctrls.bw_read::ruby.dir_cntrl0 695383824 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_read::total 695383824 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::ruby.dir_cntrl0 114035893 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::total 114035893 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_total::ruby.dir_cntrl0 809419717 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.bw_total::total 809419717 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.readReqs 1183 # Number of read requests accepted system.mem_ctrls.writeReqs 194 # Number of write requests accepted -system.mem_ctrls.readBursts 1182 # Number of DRAM read bursts, including those serviced by the write queue +system.mem_ctrls.readBursts 1183 # Number of DRAM read bursts, including those serviced by the write queue system.mem_ctrls.writeBursts 194 # Number of DRAM write bursts, including those merged in the write queue -system.mem_ctrls.bytesReadDRAM 64448 # Total number of bytes read from DRAM -system.mem_ctrls.bytesReadWrQ 11200 # Total number of bytes read from write queue -system.mem_ctrls.bytesWritten 5440 # Total number of bytes written to DRAM -system.mem_ctrls.bytesReadSys 75648 # Total read bytes from the system interface side +system.mem_ctrls.bytesReadDRAM 64576 # Total number of bytes read from DRAM +system.mem_ctrls.bytesReadWrQ 11136 # Total number of bytes read from write queue +system.mem_ctrls.bytesWritten 5504 # Total number of bytes written to DRAM +system.mem_ctrls.bytesReadSys 75712 # Total read bytes from the system interface side system.mem_ctrls.bytesWrittenSys 12416 # Total written bytes from the system interface side -system.mem_ctrls.servicedByWrQ 175 # Number of DRAM read bursts serviced by the write queue -system.mem_ctrls.mergedWrBursts 82 # Number of DRAM write bursts merged with an existing one +system.mem_ctrls.servicedByWrQ 174 # Number of DRAM read bursts serviced by the write queue +system.mem_ctrls.mergedWrBursts 81 # Number of DRAM write bursts merged with an existing one system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write system.mem_ctrls.perBankRdBursts::0 83 # Per bank write bursts system.mem_ctrls.perBankRdBursts::1 51 # Per bank write bursts @@ -53,13 +53,13 @@ system.mem_ctrls.perBankRdBursts::10 56 # Pe system.mem_ctrls.perBankRdBursts::11 51 # Per bank write bursts system.mem_ctrls.perBankRdBursts::12 21 # Per bank write bursts system.mem_ctrls.perBankRdBursts::13 365 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::14 66 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::15 40 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::14 67 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::15 41 # Per bank write bursts system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::4 17 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::4 18 # Per bank write bursts system.mem_ctrls.perBankWrBursts::5 6 # Per bank write bursts system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts @@ -73,14 +73,14 @@ system.mem_ctrls.perBankWrBursts::14 41 # Pe system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry -system.mem_ctrls.totGap 108642 # Total gap between requests +system.mem_ctrls.totGap 108826 # Total gap between requests system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::6 1182 # Read request sizes (log2) +system.mem_ctrls.readPktSize::6 1183 # Read request sizes (log2) system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) @@ -88,7 +88,7 @@ system.mem_ctrls.writePktSize::3 0 # Wr system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::6 194 # Write request sizes (log2) -system.mem_ctrls.rdQLenPdf::0 1007 # What read queue length does an incoming req see +system.mem_ctrls.rdQLenPdf::0 1009 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see @@ -135,18 +135,18 @@ system.mem_ctrls.wrQLenPdf::11 1 # Wh system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::15 3 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::15 4 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::16 4 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::17 5 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::17 4 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::18 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::19 6 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::20 7 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::20 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::21 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::22 6 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::23 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::23 7 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::24 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::25 6 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::26 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::26 7 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::27 5 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::28 5 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::29 5 # What write queue length does an incoming req see @@ -184,109 +184,108 @@ system.mem_ctrls.wrQLenPdf::60 0 # Wh system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.mem_ctrls.bytesPerActivate::samples 202 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::mean 335.524752 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::gmean 204.886741 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::stdev 324.305016 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::0-127 65 32.18% 32.18% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::128-255 47 23.27% 55.45% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::256-383 21 10.40% 65.84% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::384-511 14 6.93% 72.77% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::512-639 12 5.94% 78.71% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::640-767 11 5.45% 84.16% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::768-895 6 2.97% 87.13% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::896-1023 5 2.48% 89.60% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::1024-1151 21 10.40% 100.00% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::total 202 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::samples 203 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::mean 334.817734 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::gmean 202.715946 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::stdev 328.878595 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::0-127 65 32.02% 32.02% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::128-255 47 23.15% 55.17% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::256-383 25 12.32% 67.49% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::384-511 11 5.42% 72.91% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::512-639 11 5.42% 78.33% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::640-767 10 4.93% 83.25% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::768-895 5 2.46% 85.71% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::896-1023 8 3.94% 89.66% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::1024-1151 21 10.34% 100.00% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::total 203 # Bytes accessed per row activation system.mem_ctrls.rdPerTurnAround::samples 5 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::mean 141.200000 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::gmean 107.481731 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::stdev 78.180560 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::mean 138.600000 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::gmean 101.703151 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::stdev 85.219129 # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::16-23 1 20.00% 20.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::128-135 1 20.00% 40.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::136-143 1 20.00% 60.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::80-87 1 20.00% 40.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::168-175 1 20.00% 60.00% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::192-199 1 20.00% 80.00% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::216-223 1 20.00% 100.00% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::total 5 # Reads before turning the bus around for writes system.mem_ctrls.wrPerTurnAround::samples 5 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::mean 17 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::gmean 16.976446 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::stdev 1 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::mean 17.200000 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::gmean 17.171629 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::stdev 1.095445 # Writes before turning the bus around for reads system.mem_ctrls.wrPerTurnAround::16 2 40.00% 40.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::17 1 20.00% 60.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::18 2 40.00% 100.00% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::18 3 60.00% 100.00% # Writes before turning the bus around for reads system.mem_ctrls.wrPerTurnAround::total 5 # Writes before turning the bus around for reads -system.mem_ctrls.totQLat 6988 # Total ticks spent queuing -system.mem_ctrls.totMemAccLat 26121 # Total ticks spent from burst creation until serviced by the DRAM -system.mem_ctrls.totBusLat 5035 # Total ticks spent in databus transfers -system.mem_ctrls.avgQLat 6.94 # Average queueing delay per DRAM burst +system.mem_ctrls.totQLat 7036 # Total ticks spent queuing +system.mem_ctrls.totMemAccLat 26207 # Total ticks spent from burst creation until serviced by the DRAM +system.mem_ctrls.totBusLat 5045 # Total ticks spent in databus transfers +system.mem_ctrls.avgQLat 6.97 # Average queueing delay per DRAM burst system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst -system.mem_ctrls.avgMemAccLat 25.94 # Average memory access latency per DRAM burst -system.mem_ctrls.avgRdBW 592.93 # Average DRAM read bandwidth in MiByte/s -system.mem_ctrls.avgWrBW 50.05 # Average achieved write bandwidth in MiByte/s -system.mem_ctrls.avgRdBWSys 695.97 # Average system read bandwidth in MiByte/s -system.mem_ctrls.avgWrBWSys 114.23 # Average system write bandwidth in MiByte/s +system.mem_ctrls.avgMemAccLat 25.97 # Average memory access latency per DRAM burst +system.mem_ctrls.avgRdBW 593.10 # Average DRAM read bandwidth in MiByte/s +system.mem_ctrls.avgWrBW 50.55 # Average achieved write bandwidth in MiByte/s +system.mem_ctrls.avgRdBWSys 695.38 # Average system read bandwidth in MiByte/s +system.mem_ctrls.avgWrBWSys 114.04 # Average system write bandwidth in MiByte/s system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.mem_ctrls.busUtil 5.02 # Data bus utilization in percentage +system.mem_ctrls.busUtil 5.03 # Data bus utilization in percentage system.mem_ctrls.busUtilRead 4.63 # Data bus utilization in percentage for reads system.mem_ctrls.busUtilWrite 0.39 # Data bus utilization in percentage for writes system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing -system.mem_ctrls.avgWrQLen 21.56 # Average write queue length when enqueuing -system.mem_ctrls.readRowHits 807 # Number of row buffer hits during reads -system.mem_ctrls.writeRowHits 77 # Number of row buffer hits during writes -system.mem_ctrls.readRowHitRate 80.14 # Row buffer hit rate for reads -system.mem_ctrls.writeRowHitRate 68.75 # Row buffer hit rate for writes -system.mem_ctrls.avgGap 78.95 # Average gap between requests -system.mem_ctrls.pageHitRate 79.00 # Row buffer hit rate, read and write combined +system.mem_ctrls.avgWrQLen 21.05 # Average write queue length when enqueuing +system.mem_ctrls.readRowHits 806 # Number of row buffer hits during reads +system.mem_ctrls.writeRowHits 80 # Number of row buffer hits during writes +system.mem_ctrls.readRowHitRate 79.88 # Row buffer hit rate for reads +system.mem_ctrls.writeRowHitRate 70.80 # Row buffer hit rate for writes +system.mem_ctrls.avgGap 79.03 # Average gap between requests +system.mem_ctrls.pageHitRate 78.97 # Row buffer hit rate, read and write combined system.mem_ctrls_0.actEnergy 529200 # Energy for activate commands per rank (pJ) system.mem_ctrls_0.preEnergy 294000 # Energy for precharge commands per rank (pJ) system.mem_ctrls_0.readEnergy 5004480 # Energy for read commands per rank (pJ) -system.mem_ctrls_0.writeEnergy 238464 # Energy for write commands per rank (pJ) +system.mem_ctrls_0.writeEnergy 248832 # Energy for write commands per rank (pJ) system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_0.actBackEnergy 62170812 # Energy for active background per rank (pJ) -system.mem_ctrls_0.preBackEnergy 6351000 # Energy for precharge background per rank (pJ) -system.mem_ctrls_0.totalEnergy 81199236 # Total energy per rank (pJ) -system.mem_ctrls_0.averagePower 800.165908 # Core power per rank (mW) -system.mem_ctrls_0.memoryStateTime::IDLE 15769 # Time in different power states +system.mem_ctrls_0.actBackEnergy 61961508 # Energy for active background per rank (pJ) +system.mem_ctrls_0.preBackEnergy 6534600 # Energy for precharge background per rank (pJ) +system.mem_ctrls_0.totalEnergy 81183900 # Total energy per rank (pJ) +system.mem_ctrls_0.averagePower 800.014782 # Core power per rank (mW) +system.mem_ctrls_0.memoryStateTime::IDLE 16245 # Time in different power states system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states -system.mem_ctrls_0.memoryStateTime::ACT 87863 # Time in different power states +system.mem_ctrls_0.memoryStateTime::ACT 87571 # Time in different power states system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states system.mem_ctrls_1.actEnergy 907200 # Energy for activate commands per rank (pJ) system.mem_ctrls_1.preEnergy 504000 # Energy for precharge commands per rank (pJ) system.mem_ctrls_1.readEnergy 6764160 # Energy for read commands per rank (pJ) system.mem_ctrls_1.writeEnergy 642816 # Energy for write commands per rank (pJ) system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_1.actBackEnergy 67286448 # Energy for active background per rank (pJ) -system.mem_ctrls_1.preBackEnergy 1863600 # Energy for precharge background per rank (pJ) -system.mem_ctrls_1.totalEnergy 84579504 # Total energy per rank (pJ) -system.mem_ctrls_1.averagePower 833.476261 # Core power per rank (mW) -system.mem_ctrls_1.memoryStateTime::IDLE 2630 # Time in different power states +system.mem_ctrls_1.actBackEnergy 67902048 # Energy for active background per rank (pJ) +system.mem_ctrls_1.preBackEnergy 1323600 # Energy for precharge background per rank (pJ) +system.mem_ctrls_1.totalEnergy 84655104 # Total energy per rank (pJ) +system.mem_ctrls_1.averagePower 834.221250 # Core power per rank (mW) +system.mem_ctrls_1.memoryStateTime::IDLE 1730 # Time in different power states system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT 95482 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT 96382 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.read_hits 1183 # DTB read hits +system.cpu.dtb.read_hits 1185 # DTB read hits system.cpu.dtb.read_misses 7 # DTB read misses system.cpu.dtb.read_acv 0 # DTB read access violations -system.cpu.dtb.read_accesses 1190 # DTB read accesses +system.cpu.dtb.read_accesses 1192 # DTB read accesses system.cpu.dtb.write_hits 865 # DTB write hits system.cpu.dtb.write_misses 3 # DTB write misses system.cpu.dtb.write_acv 0 # DTB write access violations system.cpu.dtb.write_accesses 868 # DTB write accesses -system.cpu.dtb.data_hits 2048 # DTB hits +system.cpu.dtb.data_hits 2050 # DTB hits system.cpu.dtb.data_misses 10 # DTB misses system.cpu.dtb.data_acv 0 # DTB access violations -system.cpu.dtb.data_accesses 2058 # DTB accesses -system.cpu.itb.fetch_hits 6401 # ITB hits +system.cpu.dtb.data_accesses 2060 # DTB accesses +system.cpu.itb.fetch_hits 6414 # ITB hits system.cpu.itb.fetch_misses 17 # ITB misses system.cpu.itb.fetch_acv 0 # ITB acv -system.cpu.itb.fetch_accesses 6418 # ITB accesses +system.cpu.itb.fetch_accesses 6431 # ITB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.read_acv 0 # DTB read access violations @@ -300,292 +299,292 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 17 # Number of system calls -system.cpu.numCycles 108694 # number of cpu cycles simulated +system.cpu.numCycles 108878 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.committedInsts 6390 # Number of instructions committed -system.cpu.committedOps 6390 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses +system.cpu.committedInsts 6403 # Number of instructions committed +system.cpu.committedOps 6403 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 6329 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses system.cpu.num_func_calls 251 # number of times a function call or return occured -system.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls -system.cpu.num_int_insts 6317 # number of integer instructions +system.cpu.num_conditional_control_insts 754 # number of instructions that are conditional controls +system.cpu.num_int_insts 6329 # number of integer instructions system.cpu.num_fp_insts 10 # number of float instructions -system.cpu.num_int_register_reads 8285 # number of times the integer registers were read -system.cpu.num_int_register_writes 4568 # number of times the integer registers were written +system.cpu.num_int_register_reads 8297 # number of times the integer registers were read +system.cpu.num_int_register_writes 4575 # number of times the integer registers were written system.cpu.num_fp_register_reads 8 # number of times the floating registers were read system.cpu.num_fp_register_writes 2 # number of times the floating registers were written -system.cpu.num_mem_refs 2058 # number of memory refs -system.cpu.num_load_insts 1190 # Number of load instructions +system.cpu.num_mem_refs 2060 # number of memory refs +system.cpu.num_load_insts 1192 # Number of load instructions system.cpu.num_store_insts 868 # Number of store instructions system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_busy_cycles 108694 # Number of busy cycles +system.cpu.num_busy_cycles 108878 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.Branches 1050 # Number of branches fetched +system.cpu.Branches 1056 # Number of branches fetched system.cpu.op_class::No_OpClass 19 0.30% 0.30% # Class of executed instruction -system.cpu.op_class::IntAlu 4320 67.50% 67.80% # Class of executed instruction -system.cpu.op_class::IntMult 1 0.02% 67.81% # Class of executed instruction -system.cpu.op_class::IntDiv 0 0.00% 67.81% # Class of executed instruction -system.cpu.op_class::FloatAdd 2 0.03% 67.84% # Class of executed instruction -system.cpu.op_class::FloatCmp 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::FloatCvt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::FloatMult 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::FloatDiv 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::FloatSqrt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdAdd 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdAddAcc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdAlu 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdCmp 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdCvt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdMisc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdMult 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdMultAcc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdShift 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdShiftAcc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdSqrt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatAdd 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatAlu 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatCmp 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatCvt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatDiv 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatMisc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatMult 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.84% # Class of executed instruction -system.cpu.op_class::MemRead 1190 18.59% 86.44% # Class of executed instruction -system.cpu.op_class::MemWrite 868 13.56% 100.00% # Class of executed instruction +system.cpu.op_class::IntAlu 4331 67.53% 67.83% # Class of executed instruction +system.cpu.op_class::IntMult 1 0.02% 67.85% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 67.85% # Class of executed instruction +system.cpu.op_class::FloatAdd 2 0.03% 67.88% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.88% # Class of executed instruction +system.cpu.op_class::MemRead 1192 18.59% 86.46% # Class of executed instruction +system.cpu.op_class::MemWrite 868 13.54% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::total 6400 # Class of executed instruction +system.cpu.op_class::total 6413 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks system.ruby.outstanding_req_hist_seqr::bucket_size 1 system.ruby.outstanding_req_hist_seqr::max_bucket 9 -system.ruby.outstanding_req_hist_seqr::samples 8449 +system.ruby.outstanding_req_hist_seqr::samples 8464 system.ruby.outstanding_req_hist_seqr::mean 1 system.ruby.outstanding_req_hist_seqr::gmean 1 -system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8449 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.outstanding_req_hist_seqr::total 8449 +system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8464 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.outstanding_req_hist_seqr::total 8464 system.ruby.latency_hist_seqr::bucket_size 64 system.ruby.latency_hist_seqr::max_bucket 639 -system.ruby.latency_hist_seqr::samples 8448 -system.ruby.latency_hist_seqr::mean 11.866241 -system.ruby.latency_hist_seqr::gmean 1.974485 -system.ruby.latency_hist_seqr::stdev 27.814086 -system.ruby.latency_hist_seqr | 7440 88.07% 88.07% | 991 11.73% 99.80% | 4 0.05% 99.85% | 1 0.01% 99.86% | 9 0.11% 99.96% | 3 0.04% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.latency_hist_seqr::total 8448 +system.ruby.latency_hist_seqr::samples 8463 +system.ruby.latency_hist_seqr::mean 11.865178 +system.ruby.latency_hist_seqr::gmean 1.973283 +system.ruby.latency_hist_seqr::stdev 27.863065 +system.ruby.latency_hist_seqr | 7453 88.07% 88.07% | 995 11.76% 99.82% | 2 0.02% 99.85% | 0 0.00% 99.85% | 9 0.11% 99.95% | 4 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.latency_hist_seqr::total 8463 system.ruby.hit_latency_hist_seqr::bucket_size 1 system.ruby.hit_latency_hist_seqr::max_bucket 9 -system.ruby.hit_latency_hist_seqr::samples 7027 +system.ruby.hit_latency_hist_seqr::samples 7041 system.ruby.hit_latency_hist_seqr::mean 1 system.ruby.hit_latency_hist_seqr::gmean 1 -system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 7027 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.hit_latency_hist_seqr::total 7027 +system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 7041 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.hit_latency_hist_seqr::total 7041 system.ruby.miss_latency_hist_seqr::bucket_size 64 system.ruby.miss_latency_hist_seqr::max_bucket 639 -system.ruby.miss_latency_hist_seqr::samples 1421 -system.ruby.miss_latency_hist_seqr::mean 65.600985 -system.ruby.miss_latency_hist_seqr::gmean 57.082853 -system.ruby.miss_latency_hist_seqr::stdev 33.588801 -system.ruby.miss_latency_hist_seqr | 413 29.06% 29.06% | 991 69.74% 98.80% | 4 0.28% 99.09% | 1 0.07% 99.16% | 9 0.63% 99.79% | 3 0.21% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.miss_latency_hist_seqr::total 1421 -system.ruby.l1_cntrl0.L1Dcache.demand_hits 1273 # Number of cache demand hits -system.ruby.l1_cntrl0.L1Dcache.demand_misses 775 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Dcache.demand_accesses 2048 # Number of cache demand accesses -system.ruby.l1_cntrl0.L1Icache.demand_hits 5754 # Number of cache demand hits +system.ruby.miss_latency_hist_seqr::samples 1422 +system.ruby.miss_latency_hist_seqr::mean 65.663854 +system.ruby.miss_latency_hist_seqr::gmean 57.123275 +system.ruby.miss_latency_hist_seqr::stdev 33.791401 +system.ruby.miss_latency_hist_seqr | 412 28.97% 28.97% | 995 69.97% 98.95% | 2 0.14% 99.09% | 0 0.00% 99.09% | 9 0.63% 99.72% | 4 0.28% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.miss_latency_hist_seqr::total 1422 +system.ruby.l1_cntrl0.L1Dcache.demand_hits 1274 # Number of cache demand hits +system.ruby.l1_cntrl0.L1Dcache.demand_misses 776 # Number of cache demand misses +system.ruby.l1_cntrl0.L1Dcache.demand_accesses 2050 # Number of cache demand accesses +system.ruby.l1_cntrl0.L1Icache.demand_hits 5767 # Number of cache demand hits system.ruby.l1_cntrl0.L1Icache.demand_misses 646 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Icache.demand_accesses 6400 # Number of cache demand accesses +system.ruby.l1_cntrl0.L1Icache.demand_accesses 6413 # Number of cache demand accesses system.ruby.l2_cntrl0.L2cache.demand_hits 239 # Number of cache demand hits -system.ruby.l2_cntrl0.L2cache.demand_misses 1182 # Number of cache demand misses -system.ruby.l2_cntrl0.L2cache.demand_accesses 1421 # Number of cache demand accesses +system.ruby.l2_cntrl0.L2cache.demand_misses 1183 # Number of cache demand misses +system.ruby.l2_cntrl0.L2cache.demand_accesses 1422 # Number of cache demand accesses system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks -system.ruby.network.routers0.percent_links_utilized 6.936215 -system.ruby.network.routers0.msg_count.Request_Control::0 1421 -system.ruby.network.routers0.msg_count.Response_Data::2 1182 +system.ruby.network.routers0.percent_links_utilized 6.929545 +system.ruby.network.routers0.msg_count.Request_Control::0 1422 +system.ruby.network.routers0.msg_count.Response_Data::2 1183 system.ruby.network.routers0.msg_count.ResponseL2hit_Data::2 239 -system.ruby.network.routers0.msg_count.Writeback_Data::2 1308 -system.ruby.network.routers0.msg_count.Writeback_Control::0 2708 -system.ruby.network.routers0.msg_count.Unblock_Control::2 1467 -system.ruby.network.routers0.msg_bytes.Request_Control::0 11368 -system.ruby.network.routers0.msg_bytes.Response_Data::2 85104 +system.ruby.network.routers0.msg_count.Writeback_Data::2 1309 +system.ruby.network.routers0.msg_count.Writeback_Control::0 2710 +system.ruby.network.routers0.msg_count.Unblock_Control::2 1468 +system.ruby.network.routers0.msg_bytes.Request_Control::0 11376 +system.ruby.network.routers0.msg_bytes.Response_Data::2 85176 system.ruby.network.routers0.msg_bytes.ResponseL2hit_Data::2 17208 -system.ruby.network.routers0.msg_bytes.Writeback_Data::2 94176 -system.ruby.network.routers0.msg_bytes.Writeback_Control::0 21664 -system.ruby.network.routers0.msg_bytes.Unblock_Control::2 11736 -system.ruby.network.routers1.percent_links_utilized 10.417548 -system.ruby.network.routers1.msg_count.Request_Control::0 1421 -system.ruby.network.routers1.msg_count.Request_Control::1 1182 -system.ruby.network.routers1.msg_count.Response_Data::2 2364 +system.ruby.network.routers0.msg_bytes.Writeback_Data::2 94248 +system.ruby.network.routers0.msg_bytes.Writeback_Control::0 21680 +system.ruby.network.routers0.msg_bytes.Unblock_Control::2 11744 +system.ruby.network.routers1.percent_links_utilized 10.407520 +system.ruby.network.routers1.msg_count.Request_Control::0 1422 +system.ruby.network.routers1.msg_count.Request_Control::1 1183 +system.ruby.network.routers1.msg_count.Response_Data::2 2366 system.ruby.network.routers1.msg_count.ResponseL2hit_Data::2 239 -system.ruby.network.routers1.msg_count.Writeback_Data::2 1502 -system.ruby.network.routers1.msg_count.Writeback_Control::0 2708 +system.ruby.network.routers1.msg_count.Writeback_Data::2 1503 +system.ruby.network.routers1.msg_count.Writeback_Control::0 2710 system.ruby.network.routers1.msg_count.Writeback_Control::1 388 -system.ruby.network.routers1.msg_count.Unblock_Control::2 2649 -system.ruby.network.routers1.msg_bytes.Request_Control::0 11368 -system.ruby.network.routers1.msg_bytes.Request_Control::1 9456 -system.ruby.network.routers1.msg_bytes.Response_Data::2 170208 +system.ruby.network.routers1.msg_count.Unblock_Control::2 2651 +system.ruby.network.routers1.msg_bytes.Request_Control::0 11376 +system.ruby.network.routers1.msg_bytes.Request_Control::1 9464 +system.ruby.network.routers1.msg_bytes.Response_Data::2 170352 system.ruby.network.routers1.msg_bytes.ResponseL2hit_Data::2 17208 -system.ruby.network.routers1.msg_bytes.Writeback_Data::2 108144 -system.ruby.network.routers1.msg_bytes.Writeback_Control::0 21664 +system.ruby.network.routers1.msg_bytes.Writeback_Data::2 108216 +system.ruby.network.routers1.msg_bytes.Writeback_Control::0 21680 system.ruby.network.routers1.msg_bytes.Writeback_Control::1 3104 -system.ruby.network.routers1.msg_bytes.Unblock_Control::2 21192 -system.ruby.network.routers2.percent_links_utilized 3.481333 -system.ruby.network.routers2.msg_count.Request_Control::1 1182 -system.ruby.network.routers2.msg_count.Response_Data::2 1182 +system.ruby.network.routers1.msg_bytes.Unblock_Control::2 21208 +system.ruby.network.routers2.percent_links_utilized 3.477975 +system.ruby.network.routers2.msg_count.Request_Control::1 1183 +system.ruby.network.routers2.msg_count.Response_Data::2 1183 system.ruby.network.routers2.msg_count.Writeback_Data::2 194 system.ruby.network.routers2.msg_count.Writeback_Control::1 388 -system.ruby.network.routers2.msg_count.Unblock_Control::2 1182 -system.ruby.network.routers2.msg_bytes.Request_Control::1 9456 -system.ruby.network.routers2.msg_bytes.Response_Data::2 85104 +system.ruby.network.routers2.msg_count.Unblock_Control::2 1183 +system.ruby.network.routers2.msg_bytes.Request_Control::1 9464 +system.ruby.network.routers2.msg_bytes.Response_Data::2 85176 system.ruby.network.routers2.msg_bytes.Writeback_Data::2 13968 system.ruby.network.routers2.msg_bytes.Writeback_Control::1 3104 -system.ruby.network.routers2.msg_bytes.Unblock_Control::2 9456 -system.ruby.network.routers3.percent_links_utilized 6.945032 -system.ruby.network.routers3.msg_count.Request_Control::0 1421 -system.ruby.network.routers3.msg_count.Request_Control::1 1182 -system.ruby.network.routers3.msg_count.Response_Data::2 2364 +system.ruby.network.routers2.msg_bytes.Unblock_Control::2 9464 +system.ruby.network.routers3.percent_links_utilized 6.938347 +system.ruby.network.routers3.msg_count.Request_Control::0 1422 +system.ruby.network.routers3.msg_count.Request_Control::1 1183 +system.ruby.network.routers3.msg_count.Response_Data::2 2366 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-system.ruby.network.routers3.throttle2.msg_bytes.Unblock_Control::2 9456 -system.ruby.LD.latency_hist_seqr::bucket_size 64 -system.ruby.LD.latency_hist_seqr::max_bucket 639 -system.ruby.LD.latency_hist_seqr::samples 1183 -system.ruby.LD.latency_hist_seqr::mean 27.265427 -system.ruby.LD.latency_hist_seqr::gmean 5.733715 -system.ruby.LD.latency_hist_seqr::stdev 35.817674 -system.ruby.LD.latency_hist_seqr | 862 72.87% 72.87% | 317 26.80% 99.66% | 2 0.17% 99.83% | 1 0.08% 99.92% | 0 0.00% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.latency_hist_seqr::total 1183 +system.ruby.network.routers3.throttle2.msg_bytes.Unblock_Control::2 9464 +system.ruby.LD.latency_hist_seqr::bucket_size 32 +system.ruby.LD.latency_hist_seqr::max_bucket 319 +system.ruby.LD.latency_hist_seqr::samples 1185 +system.ruby.LD.latency_hist_seqr::mean 27.428692 +system.ruby.LD.latency_hist_seqr::gmean 5.747000 +system.ruby.LD.latency_hist_seqr::stdev 36.091782 +system.ruby.LD.latency_hist_seqr | 775 65.40% 65.40% | 87 7.34% 72.74% | 279 23.54% 96.29% | 40 3.38% 99.66% | 1 0.08% 99.75% | 1 0.08% 99.83% | 0 0.00% 99.83% | 0 0.00% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% +system.ruby.LD.latency_hist_seqr::total 1185 system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 -system.ruby.LD.hit_latency_hist_seqr::samples 658 +system.ruby.LD.hit_latency_hist_seqr::samples 659 system.ruby.LD.hit_latency_hist_seqr::mean 1 system.ruby.LD.hit_latency_hist_seqr::gmean 1 -system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 658 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.hit_latency_hist_seqr::total 658 -system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 -system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 -system.ruby.LD.miss_latency_hist_seqr::samples 525 -system.ruby.LD.miss_latency_hist_seqr::mean 60.184762 -system.ruby.LD.miss_latency_hist_seqr::gmean 51.169278 -system.ruby.LD.miss_latency_hist_seqr::stdev 30.689440 -system.ruby.LD.miss_latency_hist_seqr | 204 38.86% 38.86% | 317 60.38% 99.24% | 2 0.38% 99.62% | 1 0.19% 99.81% | 0 0.00% 99.81% | 1 0.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.miss_latency_hist_seqr::total 525 +system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 659 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.hit_latency_hist_seqr::total 659 +system.ruby.LD.miss_latency_hist_seqr::bucket_size 32 +system.ruby.LD.miss_latency_hist_seqr::max_bucket 319 +system.ruby.LD.miss_latency_hist_seqr::samples 526 +system.ruby.LD.miss_latency_hist_seqr::mean 60.539924 +system.ruby.LD.miss_latency_hist_seqr::gmean 51.393520 +system.ruby.LD.miss_latency_hist_seqr::stdev 31.024435 +system.ruby.LD.miss_latency_hist_seqr | 116 22.05% 22.05% | 87 16.54% 38.59% | 279 53.04% 91.63% | 40 7.60% 99.24% | 1 0.19% 99.43% | 1 0.19% 99.62% | 0 0.00% 99.62% | 0 0.00% 99.62% | 1 0.19% 99.81% | 1 0.19% 100.00% +system.ruby.LD.miss_latency_hist_seqr::total 526 system.ruby.ST.latency_hist_seqr::bucket_size 64 system.ruby.ST.latency_hist_seqr::max_bucket 639 system.ruby.ST.latency_hist_seqr::samples 865 -system.ruby.ST.latency_hist_seqr::mean 17.593064 -system.ruby.ST.latency_hist_seqr::gmean 3.080574 -system.ruby.ST.latency_hist_seqr::stdev 34.156278 -system.ruby.ST.latency_hist_seqr | 753 87.05% 87.05% | 108 12.49% 99.54% | 0 0.00% 99.54% | 0 0.00% 99.54% | 2 0.23% 99.77% | 2 0.23% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.latency_hist_seqr::mean 17.057803 +system.ruby.ST.latency_hist_seqr::gmean 3.071194 +system.ruby.ST.latency_hist_seqr::stdev 31.094076 +system.ruby.ST.latency_hist_seqr | 753 87.05% 87.05% | 110 12.72% 99.77% | 0 0.00% 99.77% | 0 0.00% 99.77% | 1 0.12% 99.88% | 1 0.12% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.ST.latency_hist_seqr::total 865 system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 @@ -597,73 +596,73 @@ system.ruby.ST.hit_latency_hist_seqr::total 615 system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 system.ruby.ST.miss_latency_hist_seqr::samples 250 -system.ruby.ST.miss_latency_hist_seqr::mean 58.412000 -system.ruby.ST.miss_latency_hist_seqr::gmean 49.053018 -system.ruby.ST.miss_latency_hist_seqr::stdev 41.173185 -system.ruby.ST.miss_latency_hist_seqr | 138 55.20% 55.20% | 108 43.20% 98.40% | 0 0.00% 98.40% | 0 0.00% 98.40% | 2 0.80% 99.20% | 2 0.80% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.miss_latency_hist_seqr::mean 56.560000 +system.ruby.ST.miss_latency_hist_seqr::gmean 48.538116 +system.ruby.ST.miss_latency_hist_seqr::stdev 33.930333 +system.ruby.ST.miss_latency_hist_seqr | 138 55.20% 55.20% | 110 44.00% 99.20% | 0 0.00% 99.20% | 0 0.00% 99.20% | 1 0.40% 99.60% | 1 0.40% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.ST.miss_latency_hist_seqr::total 250 -system.ruby.IFETCH.latency_hist_seqr::bucket_size 32 -system.ruby.IFETCH.latency_hist_seqr::max_bucket 319 -system.ruby.IFETCH.latency_hist_seqr::samples 6400 -system.ruby.IFETCH.latency_hist_seqr::mean 8.245781 -system.ruby.IFETCH.latency_hist_seqr::gmean 1.526741 -system.ruby.IFETCH.latency_hist_seqr::stdev 23.776931 -system.ruby.IFETCH.latency_hist_seqr | 5825 91.02% 91.02% | 0 0.00% 91.02% | 525 8.20% 99.22% | 41 0.64% 99.86% | 2 0.03% 99.89% | 0 0.00% 99.89% | 0 0.00% 99.89% | 0 0.00% 99.89% | 2 0.03% 99.92% | 5 0.08% 100.00% -system.ruby.IFETCH.latency_hist_seqr::total 6400 +system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 +system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 +system.ruby.IFETCH.latency_hist_seqr::samples 6413 +system.ruby.IFETCH.latency_hist_seqr::mean 8.288944 +system.ruby.IFETCH.latency_hist_seqr::gmean 1.525778 +system.ruby.IFETCH.latency_hist_seqr::stdev 24.342417 +system.ruby.IFETCH.latency_hist_seqr | 5838 91.03% 91.03% | 566 8.83% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 6 0.09% 99.95% | 3 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.latency_hist_seqr::total 6413 system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 -system.ruby.IFETCH.hit_latency_hist_seqr::samples 5754 +system.ruby.IFETCH.hit_latency_hist_seqr::samples 5767 system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 -system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 5754 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.hit_latency_hist_seqr::total 5754 -system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 32 -system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 319 +system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 5767 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.hit_latency_hist_seqr::total 5767 +system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 +system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 system.ruby.IFETCH.miss_latency_hist_seqr::samples 646 -system.ruby.IFETCH.miss_latency_hist_seqr::mean 72.784830 -system.ruby.IFETCH.miss_latency_hist_seqr::gmean 66.158480 -system.ruby.IFETCH.miss_latency_hist_seqr::stdev 31.122591 -system.ruby.IFETCH.miss_latency_hist_seqr | 71 10.99% 10.99% | 0 0.00% 10.99% | 525 81.27% 92.26% | 41 6.35% 98.61% | 2 0.31% 98.92% | 0 0.00% 98.92% | 0 0.00% 98.92% | 0 0.00% 98.92% | 2 0.31% 99.23% | 5 0.77% 100.00% +system.ruby.IFETCH.miss_latency_hist_seqr::mean 73.359133 +system.ruby.IFETCH.miss_latency_hist_seqr::gmean 66.307554 +system.ruby.IFETCH.miss_latency_hist_seqr::stdev 34.276818 +system.ruby.IFETCH.miss_latency_hist_seqr | 71 10.99% 10.99% | 566 87.62% 98.61% | 0 0.00% 98.61% | 0 0.00% 98.61% | 6 0.93% 99.54% | 3 0.46% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.IFETCH.miss_latency_hist_seqr::total 646 system.ruby.Directory_Controller.GETX 198 0.00% 0.00% -system.ruby.Directory_Controller.GETS 984 0.00% 0.00% +system.ruby.Directory_Controller.GETS 985 0.00% 0.00% system.ruby.Directory_Controller.PUTX 194 0.00% 0.00% system.ruby.Directory_Controller.Unblock 466 0.00% 0.00% -system.ruby.Directory_Controller.Last_Unblock 517 0.00% 0.00% +system.ruby.Directory_Controller.Last_Unblock 518 0.00% 0.00% system.ruby.Directory_Controller.Exclusive_Unblock 198 0.00% 0.00% system.ruby.Directory_Controller.Dirty_Writeback 194 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Data 1182 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Data 1183 0.00% 0.00% system.ruby.Directory_Controller.Memory_Ack 194 0.00% 0.00% system.ruby.Directory_Controller.I.GETX 111 0.00% 0.00% system.ruby.Directory_Controller.I.GETS 466 0.00% 0.00% system.ruby.Directory_Controller.I.Memory_Ack 194 0.00% 0.00% system.ruby.Directory_Controller.S.GETX 87 0.00% 0.00% -system.ruby.Directory_Controller.S.GETS 518 0.00% 0.00% +system.ruby.Directory_Controller.S.GETS 519 0.00% 0.00% system.ruby.Directory_Controller.M.PUTX 194 0.00% 0.00% system.ruby.Directory_Controller.IS.Unblock 466 0.00% 0.00% system.ruby.Directory_Controller.IS.Memory_Data 466 0.00% 0.00% -system.ruby.Directory_Controller.SS.Last_Unblock 517 0.00% 0.00% -system.ruby.Directory_Controller.SS.Memory_Data 518 0.00% 0.00% +system.ruby.Directory_Controller.SS.Last_Unblock 518 0.00% 0.00% +system.ruby.Directory_Controller.SS.Memory_Data 519 0.00% 0.00% system.ruby.Directory_Controller.MM.Exclusive_Unblock 198 0.00% 0.00% system.ruby.Directory_Controller.MM.Memory_Data 198 0.00% 0.00% system.ruby.Directory_Controller.MI.Dirty_Writeback 194 0.00% 0.00% -system.ruby.L1Cache_Controller.Load 1183 0.00% 0.00% -system.ruby.L1Cache_Controller.Ifetch 6400 0.00% 0.00% +system.ruby.L1Cache_Controller.Load 1185 0.00% 0.00% +system.ruby.L1Cache_Controller.Ifetch 6413 0.00% 0.00% system.ruby.L1Cache_Controller.Store 865 0.00% 0.00% -system.ruby.L1Cache_Controller.L1_Replacement 1368 0.00% 0.00% -system.ruby.L1Cache_Controller.Data 1125 0.00% 0.00% +system.ruby.L1Cache_Controller.L1_Replacement 1369 0.00% 0.00% +system.ruby.L1Cache_Controller.Data 1126 0.00% 0.00% system.ruby.L1Cache_Controller.Exclusive_Data 296 0.00% 0.00% system.ruby.L1Cache_Controller.Writeback_Ack 46 0.00% 0.00% -system.ruby.L1Cache_Controller.Writeback_Ack_Data 1308 0.00% 0.00% +system.ruby.L1Cache_Controller.Writeback_Ack_Data 1309 0.00% 0.00% system.ruby.L1Cache_Controller.All_acks 250 0.00% 0.00% system.ruby.L1Cache_Controller.Use_Timeout 296 0.00% 0.00% -system.ruby.L1Cache_Controller.I.Load 525 0.00% 0.00% +system.ruby.L1Cache_Controller.I.Load 526 0.00% 0.00% system.ruby.L1Cache_Controller.I.Ifetch 646 0.00% 0.00% system.ruby.L1Cache_Controller.I.Store 191 0.00% 0.00% -system.ruby.L1Cache_Controller.S.Load 299 0.00% 0.00% -system.ruby.L1Cache_Controller.S.Ifetch 5754 0.00% 0.00% +system.ruby.L1Cache_Controller.S.Load 300 0.00% 0.00% +system.ruby.L1Cache_Controller.S.Ifetch 5767 0.00% 0.00% system.ruby.L1Cache_Controller.S.Store 59 0.00% 0.00% -system.ruby.L1Cache_Controller.S.L1_Replacement 1059 0.00% 0.00% +system.ruby.L1Cache_Controller.S.L1_Replacement 1060 0.00% 0.00% system.ruby.L1Cache_Controller.M.Load 79 0.00% 0.00% system.ruby.L1Cache_Controller.M.Store 18 0.00% 0.00% system.ruby.L1Cache_Controller.M.L1_Replacement 27 0.00% 0.00% @@ -680,42 +679,42 @@ system.ruby.L1Cache_Controller.MM_W.Use_Timeout 251 0.00% 0.0 system.ruby.L1Cache_Controller.IM.Exclusive_Data 191 0.00% 0.00% system.ruby.L1Cache_Controller.SM.Exclusive_Data 59 0.00% 0.00% system.ruby.L1Cache_Controller.OM.All_acks 250 0.00% 0.00% -system.ruby.L1Cache_Controller.IS.Data 1125 0.00% 0.00% +system.ruby.L1Cache_Controller.IS.Data 1126 0.00% 0.00% system.ruby.L1Cache_Controller.IS.Exclusive_Data 46 0.00% 0.00% system.ruby.L1Cache_Controller.SI.Writeback_Ack 46 0.00% 0.00% -system.ruby.L1Cache_Controller.SI.Writeback_Ack_Data 1013 0.00% 0.00% +system.ruby.L1Cache_Controller.SI.Writeback_Ack_Data 1014 0.00% 0.00% system.ruby.L1Cache_Controller.MI.Writeback_Ack_Data 295 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_GETS 1171 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_GETS 1172 0.00% 0.00% system.ruby.L2Cache_Controller.L1_GETX 250 0.00% 0.00% system.ruby.L2Cache_Controller.L1_PUTX 295 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_PUTS_only 1059 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_PUTS_only 1060 0.00% 0.00% system.ruby.L2Cache_Controller.All_Acks 198 0.00% 0.00% -system.ruby.L2Cache_Controller.Data 1182 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_WBCLEANDATA 1013 0.00% 0.00% +system.ruby.L2Cache_Controller.Data 1183 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_WBCLEANDATA 1014 0.00% 0.00% system.ruby.L2Cache_Controller.L1_WBDIRTYDATA 295 0.00% 0.00% system.ruby.L2Cache_Controller.Writeback_Ack 194 0.00% 0.00% -system.ruby.L2Cache_Controller.Unblock 1171 0.00% 0.00% +system.ruby.L2Cache_Controller.Unblock 1172 0.00% 0.00% system.ruby.L2Cache_Controller.Exclusive_Unblock 296 0.00% 0.00% -system.ruby.L2Cache_Controller.L2_Replacement 1193 0.00% 0.00% -system.ruby.L2Cache_Controller.NP.L1_GETS 984 0.00% 0.00% +system.ruby.L2Cache_Controller.L2_Replacement 1194 0.00% 0.00% +system.ruby.L2Cache_Controller.NP.L1_GETS 985 0.00% 0.00% system.ruby.L2Cache_Controller.NP.L1_GETX 132 0.00% 0.00% system.ruby.L2Cache_Controller.ILS.L1_GETX 57 0.00% 0.00% -system.ruby.L2Cache_Controller.ILS.L1_PUTS_only 1013 0.00% 0.00% +system.ruby.L2Cache_Controller.ILS.L1_PUTS_only 1014 0.00% 0.00% system.ruby.L2Cache_Controller.ILX.L1_PUTX 295 0.00% 0.00% system.ruby.L2Cache_Controller.S.L1_GETS 141 0.00% 0.00% system.ruby.L2Cache_Controller.S.L1_GETX 7 0.00% 0.00% -system.ruby.L2Cache_Controller.S.L2_Replacement 906 0.00% 0.00% +system.ruby.L2Cache_Controller.S.L2_Replacement 907 0.00% 0.00% system.ruby.L2Cache_Controller.SLS.L1_GETX 2 0.00% 0.00% system.ruby.L2Cache_Controller.SLS.L1_PUTS_only 46 0.00% 0.00% system.ruby.L2Cache_Controller.SLS.L2_Replacement 93 0.00% 0.00% system.ruby.L2Cache_Controller.M.L1_GETS 46 0.00% 0.00% system.ruby.L2Cache_Controller.M.L1_GETX 52 0.00% 0.00% system.ruby.L2Cache_Controller.M.L2_Replacement 194 0.00% 0.00% -system.ruby.L2Cache_Controller.IW.L1_WBCLEANDATA 1013 0.00% 0.00% +system.ruby.L2Cache_Controller.IW.L1_WBCLEANDATA 1014 0.00% 0.00% system.ruby.L2Cache_Controller.SW.Unblock 46 0.00% 0.00% system.ruby.L2Cache_Controller.ILXW.L1_WBDIRTYDATA 295 0.00% 0.00% -system.ruby.L2Cache_Controller.IGS.Data 984 0.00% 0.00% -system.ruby.L2Cache_Controller.IGS.Unblock 984 0.00% 0.00% +system.ruby.L2Cache_Controller.IGS.Data 985 0.00% 0.00% +system.ruby.L2Cache_Controller.IGS.Unblock 985 0.00% 0.00% system.ruby.L2Cache_Controller.IGM.Data 139 0.00% 0.00% system.ruby.L2Cache_Controller.IGMLS.Data 59 0.00% 0.00% system.ruby.L2Cache_Controller.IGMO.All_Acks 198 0.00% 0.00% |