2 files changed, 37 insertions, 35 deletions

diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc
index ccac3a25d..3dde0aa35 100644
--- a/src/arch/arm/insts/mem.cc
+++ b/src/arch/arm/insts/mem.cc
@@ -48,6 +48,42 @@ using namespace std;
 namespace ArmISA
 {
 
+void
+MemoryReg::printOffset(std::ostream &os) const
+{
+    if (!add)
+        os << "-";
+    printReg(os, index);
+    if (shiftType != LSL || shiftAmt != 0) {
+        switch (shiftType) {
+          case LSL:
+            ccprintf(os, " LSL #%d", shiftAmt);
+            break;
+          case LSR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " LSR #%d", 32);
+            } else {
+                ccprintf(os, " LSR #%d", shiftAmt);
+            }
+            break;
+          case ASR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " ASR #%d", 32);
+            } else {
+                ccprintf(os, " ASR #%d", shiftAmt);
+            }
+            break;
+          case ROR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " RRX");
+            } else {
+                ccprintf(os, " ROR #%d", shiftAmt);
+            }
+            break;
+        }
+    }
+}
+
 string
 Swap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh
index 50f718b99..609afa9aa 100644
--- a/src/arch/arm/insts/mem.hh
+++ b/src/arch/arm/insts/mem.hh
@@ -246,41 +246,7 @@ class MemoryReg : public Memory
           shiftAmt(_shiftAmt), shiftType(_shiftType), index(_index)
     {}
 
-    void
-    printOffset(std::ostream &os) const
-    {
-        if (!add)
-            os << "-";
-        printReg(os, index);
-        if (shiftType != LSL || shiftAmt != 0) {
-            switch (shiftType) {
-              case LSL:
-                ccprintf(os, " LSL #%d", shiftAmt);
-                break;
-              case LSR:
-                if (shiftAmt == 0) {
-                    ccprintf(os, " LSR #%d", 32);
-                } else {
-                    ccprintf(os, " LSR #%d", shiftAmt);
-                }
-                break;
-              case ASR:
-                if (shiftAmt == 0) {
-                    ccprintf(os, " ASR #%d", 32);
-                } else {
-                    ccprintf(os, " ASR #%d", shiftAmt);
-                }
-                break;
-              case ROR:
-                if (shiftAmt == 0) {
-                    ccprintf(os, " RRX");
-                } else {
-                    ccprintf(os, " ROR #%d", shiftAmt);
-                }
-                break;
-            }
-        }
-    }
+    void printOffset(std::ostream &os) const;
 };
 
 class MemoryDReg : public MemoryReg