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-rw-r--r--src/arch/arm/isa/insts/mem.isa2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/arm/isa/insts/mem.isa b/src/arch/arm/isa/insts/mem.isa
index a7aa0b2ed..1bd70e54b 100644
--- a/src/arch/arm/isa/insts/mem.isa
+++ b/src/arch/arm/isa/insts/mem.isa
@@ -52,8 +52,6 @@ let {{
else:
eaCode += '0;'
- predicateTest = 'testPredicate(CondCodes, condCode)'
-
iop = InstObjParams(name, Name, base,
{'ea_code': eaCode,
'memacc_code': accCode,