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-rw-r--r--src/arch/arm/isa/insts/misc64.isa3
-rw-r--r--src/arch/arm/isa/insts/neon64_mem.isa12
2 files changed, 10 insertions, 5 deletions
diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa
index e063813c7..7e88bebbb 100644
--- a/src/arch/arm/isa/insts/misc64.isa
+++ b/src/arch/arm/isa/insts/misc64.isa
@@ -84,7 +84,8 @@ let {{
diff += intWidth;
}
uint64_t topBits M5_VAR_USED = ~mask(diff+1);
- uint64_t result = (Op164 >> imm1) | (Op164 << (intWidth - imm1));
+ uint64_t result = imm1 == 0 ? Op164 :
+ (Op164 >> imm1) | (Op164 << (intWidth - imm1));
result &= bitMask;
'''
diff --git a/src/arch/arm/isa/insts/neon64_mem.isa b/src/arch/arm/isa/insts/neon64_mem.isa
index af31d959e..4d3241226 100644
--- a/src/arch/arm/isa/insts/neon64_mem.isa
+++ b/src/arch/arm/isa/insts/neon64_mem.isa
@@ -185,7 +185,8 @@ let {{
if name == 'deint_neon_uop':
eCode = '''
- VReg input[4]; // input data from scratch area
+ // input data from scratch area
+ VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} };
VReg output[2]; // output data to arch. SIMD regs
VReg temp;
temp.lo = 0;
@@ -270,7 +271,8 @@ let {{
elif name == 'int_neon_uop':
eCode = '''
- VReg input[4]; // input data from arch. SIMD regs
+ // input data from arch. SIMD regs
+ VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} };
VReg output[2]; // output data to scratch area
'''
@@ -332,7 +334,8 @@ let {{
elif name == 'unpack_neon_uop':
eCode = '''
- VReg input[4]; //input data from scratch area
+ //input data from scratch area
+ VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} };
VReg output[2]; //output data to arch. SIMD regs
'''
@@ -398,7 +401,8 @@ let {{
elif name == 'pack_neon_uop':
eCode = '''
- VReg input[4]; // input data from arch. SIMD regs
+ // input data from arch. SIMD regs
+ VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} };
VReg output[2]; // output data to scratch area
'''