diff options
Diffstat (limited to 'src/dev/arm')
-rw-r--r-- | src/dev/arm/ufs_device.cc | 13 | ||||
-rw-r--r-- | src/dev/arm/ufs_device.hh | 13 |
2 files changed, 13 insertions, 13 deletions
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc index 5a5a13215..cd1bbcafb 100644 --- a/src/dev/arm/ufs_device.cc +++ b/src/dev/arm/ufs_device.cc @@ -733,8 +733,8 @@ UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams* p) : transferTrack(0), taskCommandTrack(0), idlePhaseStart(0), - SCSIResumeEvent(this), - UTPEvent(this) + SCSIResumeEvent([this]{ SCSIStart(); }, name()), + UTPEvent([this]{ finalUTP(); }, name()) { DPRINTF(UFSHostDevice, "The hostcontroller hosts %d Logic units\n", lunAvail); @@ -1280,7 +1280,8 @@ UFSHostDevice::requestHandler() task_info.size = size; task_info.done = UFSHCIMem.TMUTMRLDBR; taskInfo.push_back(task_info); - taskEventQueue.push_back(this); + taskEventQueue.push_back( + EventFunctionWrapper([this]{ taskStart(); }, name())); writeDevice(&taskEventQueue.back(), false, address, size, reinterpret_cast<uint8_t*> (&taskInfo.back().destination), 0, 0); @@ -1328,7 +1329,8 @@ UFSHostDevice::requestHandler() UTPTransferReqDesc; DPRINTF(UFSHostDevice, "Initial transfer start: 0x%8x\n", transferstart_info.done); - transferEventQueue.push_back(this); + transferEventQueue.push_back( + EventFunctionWrapper([this]{ transferStart(); }, name())); if (transferEventQueue.size() < 2) { writeDevice(&transferEventQueue.front(), false, @@ -2260,7 +2262,8 @@ UFSHostDevice::readCallback() UFSDevice[this_lun]->clearReadSignal(); SSDReadPending.push_back(UFSDevice[this_lun]->SSDReadInfo.front()); UFSDevice[this_lun]->SSDReadInfo.pop_front(); - readGarbageEventQueue.push_back(this); + readGarbageEventQueue.push_back( + EventFunctionWrapper([this]{ readGarbage(); }, name())); //make sure the queue is popped a the end of the dma transaction readDevice(false, SSDReadPending.front().offset, diff --git a/src/dev/arm/ufs_device.hh b/src/dev/arm/ufs_device.hh index 24a05b022..69abc2741 100644 --- a/src/dev/arm/ufs_device.hh +++ b/src/dev/arm/ufs_device.hh @@ -1150,28 +1150,25 @@ class UFSHostDevice : public DmaDevice /** * Wait for the SCSI specific data to arive */ - EventWrapper<UFSHostDevice, &UFSHostDevice::SCSIStart> SCSIResumeEvent; + EventFunctionWrapper SCSIResumeEvent; /** * Wait for the moment where we can send the last frame */ - EventWrapper<UFSHostDevice, &UFSHostDevice::finalUTP> UTPEvent; + EventFunctionWrapper UTPEvent; /** * Event after a read to clean up the UTP data structures */ - std::deque<EventWrapper<UFSHostDevice, &UFSHostDevice::readGarbage> > - readGarbageEventQueue; + std::deque<EventFunctionWrapper> readGarbageEventQueue; /** * Multiple tasks transfers can be scheduled at once for the device, the * only thing we know for sure about them is that they will happen in a * first come first serve order; hence we need to queue. */ - std::deque<EventWrapper<UFSHostDevice, &UFSHostDevice::taskStart> > - taskEventQueue; - std::deque<EventWrapper<UFSHostDevice, &UFSHostDevice::transferStart> > - transferEventQueue; + std::deque<EventFunctionWrapper> taskEventQueue; + std::deque<EventFunctionWrapper> transferEventQueue; /** * Bits of interest within UFS data packages |