diff options
Diffstat (limited to 'src/mem/cache/cache_impl.hh')
-rw-r--r-- | src/mem/cache/cache_impl.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index fa6f6c860..fcdac1116 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -352,7 +352,7 @@ Cache<TagStore>::access(PacketPtr pkt, BlkType *&blk, class ForwardResponseRecord : public Packet::SenderState, public FastAlloc { Packet::SenderState *prevSenderState; - int prevSrc; + Packet::NodeID prevSrc; #ifndef NDEBUG BaseCache *cache; #endif @@ -606,7 +606,7 @@ Cache<TagStore>::getBusPacket(PacketPtr cpu_pkt, BlkType *blk, // block is invalid cmd = needsExclusive ? MemCmd::ReadExReq : MemCmd::ReadReq; } - PacketPtr pkt = new Packet(cpu_pkt->req, cmd, Packet::Broadcast, blkSize); + PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize); pkt->allocate(); return pkt; @@ -1002,7 +1002,7 @@ Cache<TagStore>::writebackBlk(BlkType *blk) Request *writebackReq = new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0, Request::wbMasterId); - PacketPtr writeback = new Packet(writebackReq, MemCmd::Writeback, -1); + PacketPtr writeback = new Packet(writebackReq, MemCmd::Writeback); if (blk->isWritable()) { writeback->setSupplyExclusive(); } |