summaryrefslogtreecommitdiff
path: root/src/python/m5
diff options
context:
space:
mode:
Diffstat (limited to 'src/python/m5')
-rw-r--r--src/python/m5/SimObject.py13
-rw-r--r--src/python/m5/simulate.py6
2 files changed, 2 insertions, 17 deletions
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index ae6b2035e..c8227c067 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -1050,19 +1050,6 @@ class SimObject(object):
for portRef in self._port_refs.itervalues():
portRef.ccConnect()
- def getMemoryMode(self):
- if not isinstance(self, m5.objects.System):
- return None
-
- return self._ccObject.getMemoryMode()
-
- def changeTiming(self, mode):
- if isinstance(self, m5.objects.System):
- # i don't know if there's a better way to do this - calling
- # setMemoryMode directly from self._ccObject results in calling
- # SimObject::setMemoryMode, not the System::setMemoryMode
- self._ccObject.setMemoryMode(mode)
-
def takeOverFrom(self, old_cpu):
self._ccObject.takeOverFrom(old_cpu._ccObject)
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index 0f2a546c1..17150cd4f 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -194,8 +194,7 @@ def changeToAtomic(system):
if system.getMemoryMode() != objects.params.atomic:
doDrain(system)
print "Changing memory mode to atomic"
- for obj in system.descendants():
- obj.changeTiming(objects.params.atomic)
+ system.setMemoryMode(objects.params.atomic)
def changeToTiming(system):
if not isinstance(system, (objects.Root, objects.System)):
@@ -204,8 +203,7 @@ def changeToTiming(system):
if system.getMemoryMode() != objects.params.timing:
print "Changing memory mode to timing"
- for obj in system.descendants():
- obj.changeTiming(objects.params.timing)
+ system.setMemoryMode(objects.params.timing)
def switchCpus(cpuList):
print "switching cpus"