diff options
Diffstat (limited to 'src/systemc/tests/systemc/tracing/wif_trace/test05')
-rw-r--r-- | src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif | 176 | ||||
-rw-r--r-- | src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp | 115 |
2 files changed, 291 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif b/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif new file mode 100644 index 000000000..38b76b2c1 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 3 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 11 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 13 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 13 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 43 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp new file mode 100644 index 000000000..c84d0fd42 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in<bool> clk; + + char obj1; + short obj2; + int obj3; + long obj4; + int64 obj5; + + proc1( sc_module_name NAME, + sc_signal<bool>& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = -1023; + obj4 = 2047; + obj5 = -1; + obj5 = obj5 << 40; + wait(); + obj1 = 1; + obj2 = -2; + obj3 = 1024; + obj4 = -2048; + obj5 = 7; + obj5 = obj5 << 40; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal<bool> clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test05"); + sc_trace(tf, P1.obj1, "Char", 4); + sc_trace(tf, P1.obj2, "Short", 12); + sc_trace(tf, P1.obj3, "Int", 14); + sc_trace(tf, P1.obj4, "Long", 14); + sc_trace(tf, P1.obj5, "Int64", 44); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} |