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-rw-r--r--src/cpu/o3/dyn_inst.hh2
-rw-r--r--src/cpu/o3/fetch.hh1
2 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 8a0ae1d56..47dc830e0 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -65,8 +65,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
/** Binary machine instruction type. */
typedef TheISA::MachInst MachInst;
- /** Extended machine instruction type. */
- typedef TheISA::ExtMachInst ExtMachInst;
/** Register types. */
typedef TheISA::IntReg IntReg;
typedef TheISA::FloatReg FloatReg;
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 672fb499b..4382197f4 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -83,7 +83,6 @@ class DefaultFetch
/** Typedefs from ISA. */
typedef TheISA::MachInst MachInst;
- typedef TheISA::ExtMachInst ExtMachInst;
class FetchTranslation : public BaseTLB::Translation
{