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-rw-r--r--tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini102
-rwxr-xr-xtests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr6
-rwxr-xr-xtests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout42
-rw-r--r--tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt77
4 files changed, 227 insertions, 0 deletions
diff --git a/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
new file mode 100644
index 000000000..282141772
--- /dev/null
+++ b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
@@ -0,0 +1,102 @@
+[root]
+type=Root
+children=system
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
+
+[system]
+type=System
+children=cpu membus physmem
+mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
+physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
+system_port=system.membus.port[0]
+
+[system.cpu]
+type=AtomicSimpleCPU
+children=dtb itb tracer workload
+checker=Null
+clock=500
+cpu_id=0
+defer_registration=false
+do_checkpoint_insts=true
+do_statistics_insts=true
+dtb=system.cpu.dtb
+function_trace=false
+function_trace_start=0
+itb=system.cpu.itb
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+numThreads=1
+phase=0
+progress_interval=0
+simulate_data_stalls=false
+simulate_inst_stalls=false
+system=system
+tracer=system.cpu.tracer
+width=1
+workload=system.cpu.workload
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
+
+[system.cpu.dtb]
+type=AlphaTLB
+size=64
+
+[system.cpu.itb]
+type=AlphaTLB
+size=48
+
+[system.cpu.tracer]
+type=ExeTracer
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=gzip input.log 1
+cwd=build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic
+egid=100
+env=
+errout=cerr
+euid=100
+executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip
+gid=100
+input=cin
+max_stack_size=67108864
+output=cout
+pid=100
+ppid=99
+simpoint=0
+system=system
+uid=100
+
+[system.membus]
+type=Bus
+block_size=64
+bus_id=0
+clock=1000
+header_cycles=1
+use_default_range=false
+width=64
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+
+[system.physmem]
+type=PhysicalMemory
+file=
+latency=30000
+latency_var=0
+null=false
+range=0:134217727
+zero=false
+port=system.membus.port[1]
+
diff --git a/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr
new file mode 100755
index 000000000..1b49765a7
--- /dev/null
+++ b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr
@@ -0,0 +1,6 @@
+warn: Sockets disabled, not accepting gdb connections
+warn: Prefetch instructions in Alpha do not do anything
+warn: Prefetch instructions in Alpha do not do anything
+warn: Prefetch instructions in Alpha do not do anything
+warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+hack: be nice to actually delete the event here
diff --git a/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout
new file mode 100755
index 000000000..1dc402141
--- /dev/null
+++ b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout
@@ -0,0 +1,42 @@
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
+
+gem5 compiled Jan 23 2012 04:48:33
+gem5 started Jan 23 2012 05:24:12
+gem5 executing on zizzer
+command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/simple-atomic
+Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
+info: Increasing stack size by one page.
+spec_init
+Loading Input Data
+Duplicating 262144 bytes
+Duplicating 524288 bytes
+Input data 1048576 bytes in length
+Compressing Input Data, level 1
+Compressed data 108074 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 3
+Compressed data 97831 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 5
+Compressed data 83382 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 7
+Compressed data 76606 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 9
+Compressed data 73189 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Tested 1MB buffer: OK!
+Exiting @ tick 300930958000 because target called exit()
diff --git a/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt
new file mode 100644
index 000000000..ad4f39b85
--- /dev/null
+++ b/tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt
@@ -0,0 +1,77 @@
+
+---------- Begin Simulation Statistics ----------
+sim_seconds 0.300931 # Number of seconds simulated
+sim_ticks 300930958000 # Number of ticks simulated
+final_tick 300930958000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_freq 1000000000000 # Frequency of simulated ticks
+host_inst_rate 4527143 # Simulator instruction rate (inst/s)
+host_tick_rate 2263589972 # Simulator tick rate (ticks/s)
+host_mem_usage 198960 # Number of bytes of host memory used
+host_seconds 132.94 # Real time elapsed on the host
+sim_insts 601856964 # Number of instructions simulated
+system.physmem.bytes_read 2782990928 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 2407447588 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 152669504 # Number of bytes written to this memory
+system.physmem.num_reads 716375939 # Number of read requests responded to by this memory
+system.physmem.num_writes 39451321 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 9247938286 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 7999999747 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 507324022 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 9755262308 # Total bandwidth to/from this memory (bytes/s)
+system.cpu.dtb.fetch_hits 0 # ITB hits
+system.cpu.dtb.fetch_misses 0 # ITB misses
+system.cpu.dtb.fetch_acv 0 # ITB acv
+system.cpu.dtb.fetch_accesses 0 # ITB accesses
+system.cpu.dtb.read_hits 114514042 # DTB read hits
+system.cpu.dtb.read_misses 2631 # DTB read misses
+system.cpu.dtb.read_acv 0 # DTB read access violations
+system.cpu.dtb.read_accesses 114516673 # DTB read accesses
+system.cpu.dtb.write_hits 39451321 # DTB write hits
+system.cpu.dtb.write_misses 2302 # DTB write misses
+system.cpu.dtb.write_acv 0 # DTB write access violations
+system.cpu.dtb.write_accesses 39453623 # DTB write accesses
+system.cpu.dtb.data_hits 153965363 # DTB hits
+system.cpu.dtb.data_misses 4933 # DTB misses
+system.cpu.dtb.data_acv 0 # DTB access violations
+system.cpu.dtb.data_accesses 153970296 # DTB accesses
+system.cpu.itb.fetch_hits 601861897 # ITB hits
+system.cpu.itb.fetch_misses 20 # ITB misses
+system.cpu.itb.fetch_acv 0 # ITB acv
+system.cpu.itb.fetch_accesses 601861917 # ITB accesses
+system.cpu.itb.read_hits 0 # DTB read hits
+system.cpu.itb.read_misses 0 # DTB read misses
+system.cpu.itb.read_acv 0 # DTB read access violations
+system.cpu.itb.read_accesses 0 # DTB read accesses
+system.cpu.itb.write_hits 0 # DTB write hits
+system.cpu.itb.write_misses 0 # DTB write misses
+system.cpu.itb.write_acv 0 # DTB write access violations
+system.cpu.itb.write_accesses 0 # DTB write accesses
+system.cpu.itb.data_hits 0 # DTB hits
+system.cpu.itb.data_misses 0 # DTB misses
+system.cpu.itb.data_acv 0 # DTB access violations
+system.cpu.itb.data_accesses 0 # DTB accesses
+system.cpu.workload.num_syscalls 17 # Number of system calls
+system.cpu.numCycles 601861917 # number of cpu cycles simulated
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.num_insts 601856964 # Number of instructions executed
+system.cpu.num_int_alu_accesses 563959696 # Number of integer alu accesses
+system.cpu.num_fp_alu_accesses 1520 # Number of float alu accesses
+system.cpu.num_func_calls 2395217 # number of times a function call or return occured
+system.cpu.num_conditional_control_insts 58554292 # number of instructions that are conditional controls
+system.cpu.num_int_insts 563959696 # number of integer instructions
+system.cpu.num_fp_insts 1520 # number of float instructions
+system.cpu.num_int_register_reads 801088993 # number of times the integer registers were read
+system.cpu.num_int_register_writes 463854847 # number of times the integer registers were written
+system.cpu.num_fp_register_reads 169 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 42 # number of times the floating registers were written
+system.cpu.num_mem_refs 153970296 # number of memory refs
+system.cpu.num_load_insts 114516673 # Number of load instructions
+system.cpu.num_store_insts 39453623 # Number of store instructions
+system.cpu.num_idle_cycles 0 # Number of idle cycles
+system.cpu.num_busy_cycles 601861917 # Number of busy cycles
+system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0 # Percentage of idle cycles
+
+---------- End Simulation Statistics ----------