diff options
Diffstat (limited to 'tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt')
-rw-r--r-- | tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt index 5d202194f..d9427be27 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.241902 # Nu sim_ticks 1241902335500 # Number of ticks simulated final_tick 1241902335500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 311711 # Simulator instruction rate (inst/s) -host_op_rate 311711 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 211957790 # Simulator tick rate (ticks/s) -host_mem_usage 254092 # Number of bytes of host memory used -host_seconds 5859.20 # Real time elapsed on the host +host_inst_rate 473348 # Simulator instruction rate (inst/s) +host_op_rate 473348 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 321867657 # Simulator tick rate (ticks/s) +host_mem_usage 255296 # Number of bytes of host memory used +host_seconds 3858.43 # Real time elapsed on the host sim_insts 1826378509 # Number of instructions simulated sim_ops 1826378509 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -366,7 +366,9 @@ system.cpu.op_class_0::FloatAdd 805244 0.04% 66.50% # Cl system.cpu.op_class_0::FloatCmp 13 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::FloatCvt 100 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::FloatMult 11 0.00% 66.50% # Class of committed instruction +system.cpu.op_class_0::FloatMultAcc 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::FloatDiv 24 0.00% 66.50% # Class of committed instruction +system.cpu.op_class_0::FloatMisc 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::FloatSqrt 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::SimdAdd 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::SimdAddAcc 0 0.00% 66.50% # Class of committed instruction @@ -388,8 +390,10 @@ system.cpu.op_class_0::SimdFloatMisc 0 0.00% 66.50% # Cl system.cpu.op_class_0::SimdFloatMult 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 66.50% # Class of committed instruction system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 66.50% # Class of committed instruction -system.cpu.op_class_0::MemRead 449492741 24.61% 91.11% # Class of committed instruction -system.cpu.op_class_0::MemWrite 162429806 8.89% 100.00% # Class of committed instruction +system.cpu.op_class_0::MemRead 449492662 24.61% 91.11% # Class of committed instruction +system.cpu.op_class_0::MemWrite 162429751 8.89% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemRead 79 0.00% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemWrite 55 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::total 1826378509 # Class of committed instruction |