diff options
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer')
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt | 291 |
1 files changed, 148 insertions, 143 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt index 391ee4c59..2c1a5d0e0 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000036 # Nu sim_ticks 36255 # Number of ticks simulated final_tick 36255 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 16369 # Simulator instruction rate (inst/s) -host_op_rate 16367 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 230240 # Simulator tick rate (ticks/s) -host_mem_usage 435584 # Number of bytes of host memory used -host_seconds 0.16 # Real time elapsed on the host +host_inst_rate 60442 # Simulator instruction rate (inst/s) +host_op_rate 60421 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 849780 # Simulator tick rate (ticks/s) +host_mem_usage 449324 # Number of bytes of host memory used +host_seconds 0.04 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -232,29 +232,126 @@ system.mem_ctrls.readRowHitRate 80.27 # Ro system.mem_ctrls.writeRowHitRate 32.61 # Row buffer hit rate for writes system.mem_ctrls.avgGap 69.32 # Average gap between requests system.mem_ctrls.pageHitRate 75.06 # Row buffer hit rate, read and write combined -system.mem_ctrls.memoryStateTime::IDLE 11 # Time in different power states -system.mem_ctrls.memoryStateTime::REF 1040 # Time in different power states -system.mem_ctrls.memoryStateTime::PRE_PDN 0 # Time in different power states -system.mem_ctrls.memoryStateTime::ACT 30367 # Time in different power states -system.mem_ctrls.memoryStateTime::ACT_PDN 0 # Time in different power states -system.mem_ctrls.actEnergy::0 143640 # Energy for activate commands per rank (pJ) -system.mem_ctrls.actEnergy::1 309960 # Energy for activate commands per rank (pJ) -system.mem_ctrls.preEnergy::0 79800 # Energy for precharge commands per rank (pJ) -system.mem_ctrls.preEnergy::1 172200 # Energy for precharge commands per rank (pJ) -system.mem_ctrls.readEnergy::0 1634880 # Energy for read commands per rank (pJ) -system.mem_ctrls.readEnergy::1 2446080 # Energy for read commands per rank (pJ) -system.mem_ctrls.writeEnergy::0 0 # Energy for write commands per rank (pJ) -system.mem_ctrls.writeEnergy::1 165888 # Energy for write commands per rank (pJ) -system.mem_ctrls.refreshEnergy::0 2034240 # Energy for refresh commands per rank (pJ) -system.mem_ctrls.refreshEnergy::1 2034240 # Energy for refresh commands per rank (pJ) -system.mem_ctrls.actBackEnergy::0 20833956 # Energy for active background per rank (pJ) -system.mem_ctrls.actBackEnergy::1 21069936 # Energy for active background per rank (pJ) -system.mem_ctrls.preBackEnergy::0 567000 # Energy for precharge background per rank (pJ) -system.mem_ctrls.preBackEnergy::1 360000 # Energy for precharge background per rank (pJ) -system.mem_ctrls.totalEnergy::0 25293516 # Total energy per rank (pJ) -system.mem_ctrls.totalEnergy::1 26558304 # Total energy per rank (pJ) -system.mem_ctrls.averagePower::0 805.423386 # Core power per rank (mW) -system.mem_ctrls.averagePower::1 845.698128 # Core power per rank (mW) +system.mem_ctrls_0.actEnergy 143640 # Energy for activate commands per rank (pJ) +system.mem_ctrls_0.preEnergy 79800 # Energy for precharge commands per rank (pJ) +system.mem_ctrls_0.readEnergy 1634880 # Energy for read commands per rank (pJ) +system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ) +system.mem_ctrls_0.refreshEnergy 2034240 # Energy for refresh commands per rank (pJ) +system.mem_ctrls_0.actBackEnergy 20833956 # Energy for active background per rank (pJ) +system.mem_ctrls_0.preBackEnergy 567000 # Energy for precharge background per rank (pJ) +system.mem_ctrls_0.totalEnergy 25293516 # Total energy per rank (pJ) +system.mem_ctrls_0.averagePower 805.423386 # Core power per rank (mW) +system.mem_ctrls_0.memoryStateTime::IDLE 847 # Time in different power states +system.mem_ctrls_0.memoryStateTime::REF 1040 # Time in different power states +system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states +system.mem_ctrls_0.memoryStateTime::ACT 29531 # Time in different power states +system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states +system.mem_ctrls_1.actEnergy 309960 # Energy for activate commands per rank (pJ) +system.mem_ctrls_1.preEnergy 172200 # Energy for precharge commands per rank (pJ) +system.mem_ctrls_1.readEnergy 2446080 # Energy for read commands per rank (pJ) +system.mem_ctrls_1.writeEnergy 165888 # Energy for write commands per rank (pJ) +system.mem_ctrls_1.refreshEnergy 2034240 # Energy for refresh commands per rank (pJ) +system.mem_ctrls_1.actBackEnergy 21069936 # Energy for active background per rank (pJ) +system.mem_ctrls_1.preBackEnergy 360000 # Energy for precharge background per rank (pJ) +system.mem_ctrls_1.totalEnergy 26558304 # Total energy per rank (pJ) +system.mem_ctrls_1.averagePower 845.698128 # Core power per rank (mW) +system.mem_ctrls_1.memoryStateTime::IDLE 1450 # Time in different power states +system.mem_ctrls_1.memoryStateTime::REF 1040 # Time in different power states +system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT 29876 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.cpu.clk_domain.clock 1 # Clock period in ticks +system.cpu.dtb.fetch_hits 0 # ITB hits +system.cpu.dtb.fetch_misses 0 # ITB misses +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_accesses 0 # ITB accesses +system.cpu.dtb.read_hits 415 # DTB read hits +system.cpu.dtb.read_misses 4 # DTB read misses +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_accesses 419 # DTB read accesses +system.cpu.dtb.write_hits 294 # DTB write hits +system.cpu.dtb.write_misses 4 # DTB write misses +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_accesses 298 # DTB write accesses +system.cpu.dtb.data_hits 709 # DTB hits +system.cpu.dtb.data_misses 8 # DTB misses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_accesses 717 # DTB accesses +system.cpu.itb.fetch_hits 2586 # ITB hits +system.cpu.itb.fetch_misses 11 # ITB misses +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_accesses 2597 # ITB accesses +system.cpu.itb.read_hits 0 # DTB read hits +system.cpu.itb.read_misses 0 # DTB read misses +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_accesses 0 # DTB read accesses +system.cpu.itb.write_hits 0 # DTB write hits +system.cpu.itb.write_misses 0 # DTB write misses +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.numCycles 36255 # number of cpu cycles simulated +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.committedInsts 2577 # Number of instructions committed +system.cpu.committedOps 2577 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 2375 # Number of integer alu accesses +system.cpu.num_fp_alu_accesses 6 # Number of float alu accesses +system.cpu.num_func_calls 140 # number of times a function call or return occured +system.cpu.num_conditional_control_insts 238 # number of instructions that are conditional controls +system.cpu.num_int_insts 2375 # number of integer instructions +system.cpu.num_fp_insts 6 # number of float instructions +system.cpu.num_int_register_reads 2998 # number of times the integer registers were read +system.cpu.num_int_register_writes 1768 # number of times the integer registers were written +system.cpu.num_fp_register_reads 6 # number of times the floating registers were read +system.cpu.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu.num_mem_refs 717 # number of memory refs +system.cpu.num_load_insts 419 # Number of load instructions +system.cpu.num_store_insts 298 # Number of store instructions +system.cpu.num_idle_cycles 0 # Number of idle cycles +system.cpu.num_busy_cycles 36255 # Number of busy cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.idle_fraction 0 # Percentage of idle cycles +system.cpu.Branches 396 # Number of branches fetched +system.cpu.op_class::No_OpClass 189 7.31% 7.31% # Class of executed instruction +system.cpu.op_class::IntAlu 1678 64.91% 72.22% # Class of executed instruction +system.cpu.op_class::IntMult 1 0.04% 72.26% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatAdd 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 72.26% # Class of executed instruction +system.cpu.op_class::MemRead 419 16.21% 88.47% # Class of executed instruction +system.cpu.op_class::MemWrite 298 11.53% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks system.ruby.outstanding_req_hist::bucket_size 1 system.ruby.outstanding_req_hist::max_bucket 9 @@ -288,7 +385,9 @@ system.ruby.miss_latency_hist::stdev 26.697338 system.ruby.miss_latency_hist | 59 13.38% 13.38% | 290 65.76% 79.14% | 87 19.73% 98.87% | 1 0.23% 99.09% | 0 0.00% 99.09% | 0 0.00% 99.09% | 0 0.00% 99.09% | 0 0.00% 99.09% | 1 0.23% 99.32% | 3 0.68% 100.00% system.ruby.miss_latency_hist::total 441 system.ruby.Directory.incomplete_times 440 -system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.dir_cntrl0.probeFilter.demand_hits 0 # Number of cache demand hits +system.ruby.dir_cntrl0.probeFilter.demand_misses 0 # Number of cache demand misses +system.ruby.dir_cntrl0.probeFilter.demand_accesses 0 # Number of cache demand accesses system.ruby.l1_cntrl0.L1Dcache.demand_hits 469 # Number of cache demand hits system.ruby.l1_cntrl0.L1Dcache.demand_misses 240 # Number of cache demand misses system.ruby.l1_cntrl0.L1Dcache.demand_accesses 709 # Number of cache demand accesses @@ -298,7 +397,7 @@ system.ruby.l1_cntrl0.L1Icache.demand_accesses 2585 system.ruby.l1_cntrl0.L2cache.demand_hits 69 # Number of cache demand hits system.ruby.l1_cntrl0.L2cache.demand_misses 441 # Number of cache demand misses system.ruby.l1_cntrl0.L2cache.demand_accesses 510 # Number of cache demand accesses -system.cpu.clk_domain.clock 1 # Clock period in ticks +system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks system.ruby.network.routers0.percent_links_utilized 4.670390 system.ruby.network.routers0.msg_count.Request_Control::2 441 system.ruby.network.routers0.msg_count.Response_Data::4 441 @@ -314,9 +413,6 @@ system.ruby.network.routers0.msg_bytes.Writeback_Control::2 3400 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 3400 system.ruby.network.routers0.msg_bytes.Writeback_Control::5 2752 system.ruby.network.routers0.msg_bytes.Unblock_Control::5 3520 -system.ruby.dir_cntrl0.probeFilter.demand_hits 0 # Number of cache demand hits -system.ruby.dir_cntrl0.probeFilter.demand_misses 0 # Number of cache demand misses -system.ruby.dir_cntrl0.probeFilter.demand_accesses 0 # Number of cache demand accesses system.ruby.network.routers1.percent_links_utilized 4.670390 system.ruby.network.routers1.msg_count.Request_Control::2 441 system.ruby.network.routers1.msg_count.Response_Data::4 441 @@ -357,97 +453,6 @@ system.ruby.network.msg_byte.Response_Data 95256 system.ruby.network.msg_byte.Writeback_Data 17496 system.ruby.network.msg_byte.Writeback_Control 28656 system.ruby.network.msg_byte.Unblock_Control 10560 -system.cpu.dtb.fetch_hits 0 # ITB hits -system.cpu.dtb.fetch_misses 0 # ITB misses -system.cpu.dtb.fetch_acv 0 # ITB acv -system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.read_hits 415 # DTB read hits -system.cpu.dtb.read_misses 4 # DTB read misses -system.cpu.dtb.read_acv 0 # DTB read access violations -system.cpu.dtb.read_accesses 419 # DTB read accesses -system.cpu.dtb.write_hits 294 # DTB write hits -system.cpu.dtb.write_misses 4 # DTB write misses -system.cpu.dtb.write_acv 0 # DTB write access violations -system.cpu.dtb.write_accesses 298 # DTB write accesses -system.cpu.dtb.data_hits 709 # DTB hits -system.cpu.dtb.data_misses 8 # DTB misses -system.cpu.dtb.data_acv 0 # DTB access violations -system.cpu.dtb.data_accesses 717 # DTB accesses -system.cpu.itb.fetch_hits 2586 # ITB hits -system.cpu.itb.fetch_misses 11 # ITB misses -system.cpu.itb.fetch_acv 0 # ITB acv -system.cpu.itb.fetch_accesses 2597 # ITB accesses -system.cpu.itb.read_hits 0 # DTB read hits -system.cpu.itb.read_misses 0 # DTB read misses -system.cpu.itb.read_acv 0 # DTB read access violations -system.cpu.itb.read_accesses 0 # DTB read accesses -system.cpu.itb.write_hits 0 # DTB write hits -system.cpu.itb.write_misses 0 # DTB write misses -system.cpu.itb.write_acv 0 # DTB write access violations -system.cpu.itb.write_accesses 0 # DTB write accesses -system.cpu.itb.data_hits 0 # DTB hits -system.cpu.itb.data_misses 0 # DTB misses -system.cpu.itb.data_acv 0 # DTB access violations -system.cpu.itb.data_accesses 0 # DTB accesses -system.cpu.workload.num_syscalls 4 # Number of system calls -system.cpu.numCycles 36255 # number of cpu cycles simulated -system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.committedInsts 2577 # Number of instructions committed -system.cpu.committedOps 2577 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 2375 # Number of integer alu accesses -system.cpu.num_fp_alu_accesses 6 # Number of float alu accesses -system.cpu.num_func_calls 140 # number of times a function call or return occured -system.cpu.num_conditional_control_insts 238 # number of instructions that are conditional controls -system.cpu.num_int_insts 2375 # number of integer instructions -system.cpu.num_fp_insts 6 # number of float instructions -system.cpu.num_int_register_reads 2998 # number of times the integer registers were read -system.cpu.num_int_register_writes 1768 # number of times the integer registers were written -system.cpu.num_fp_register_reads 6 # number of times the floating registers were read -system.cpu.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu.num_mem_refs 717 # number of memory refs -system.cpu.num_load_insts 419 # Number of load instructions -system.cpu.num_store_insts 298 # Number of store instructions -system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_busy_cycles 36255 # Number of busy cycles -system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.Branches 396 # Number of branches fetched -system.cpu.op_class::No_OpClass 189 7.31% 7.31% # Class of executed instruction -system.cpu.op_class::IntAlu 1678 64.91% 72.22% # Class of executed instruction -system.cpu.op_class::IntMult 1 0.04% 72.26% # Class of executed instruction -system.cpu.op_class::IntDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::FloatSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAddAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdAlu 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMisc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdMultAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdShift 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdShiftAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatAdd 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatAlu 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatCmp 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatCvt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatDiv 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMisc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMult 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatMultAcc 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::SimdFloatSqrt 0 0.00% 72.26% # Class of executed instruction -system.cpu.op_class::MemRead 419 16.21% 88.47% # Class of executed instruction -system.cpu.op_class::MemWrite 298 11.53% 100.00% # Class of executed instruction -system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.network.routers0.throttle0.link_utilization 6.059854 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 441 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 425 @@ -682,6 +687,25 @@ system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 62.229629 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 23.299188 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 199 80.24% 80.24% | 46 18.55% 98.79% | 1 0.40% 99.19% | 0 0.00% 99.19% | 0 0.00% 99.19% | 0 0.00% 99.19% | 0 0.00% 99.19% | 0 0.00% 99.19% | 2 0.81% 100.00% system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 248 +system.ruby.Directory_Controller.GETX 51 0.00% 0.00% +system.ruby.Directory_Controller.GETS 409 0.00% 0.00% +system.ruby.Directory_Controller.PUT 425 0.00% 0.00% +system.ruby.Directory_Controller.UnblockM 440 0.00% 0.00% +system.ruby.Directory_Controller.Writeback_Exclusive_Clean 344 0.00% 0.00% +system.ruby.Directory_Controller.Writeback_Exclusive_Dirty 81 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Data 441 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Ack 81 0.00% 0.00% +system.ruby.Directory_Controller.NO.PUT 425 0.00% 0.00% +system.ruby.Directory_Controller.E.GETX 47 0.00% 0.00% +system.ruby.Directory_Controller.E.GETS 394 0.00% 0.00% +system.ruby.Directory_Controller.NO_B.UnblockM 440 0.00% 0.00% +system.ruby.Directory_Controller.NO_B_W.Memory_Data 441 0.00% 0.00% +system.ruby.Directory_Controller.WB.GETX 4 0.00% 0.00% +system.ruby.Directory_Controller.WB.GETS 14 0.00% 0.00% +system.ruby.Directory_Controller.WB.Writeback_Exclusive_Clean 344 0.00% 0.00% +system.ruby.Directory_Controller.WB.Writeback_Exclusive_Dirty 81 0.00% 0.00% +system.ruby.Directory_Controller.WB_E_W.GETS 1 0.00% 0.00% +system.ruby.Directory_Controller.WB_E_W.Memory_Ack 81 0.00% 0.00% system.ruby.L1Cache_Controller.Load 422 0.00% 0.00% system.ruby.L1Cache_Controller.Ifetch 2591 0.00% 0.00% system.ruby.L1Cache_Controller.Store 298 0.00% 0.00% @@ -723,24 +747,5 @@ system.ruby.L1Cache_Controller.MI.Store 4 0.00% 0.00% system.ruby.L1Cache_Controller.MI.Writeback_Ack 425 0.00% 0.00% system.ruby.L1Cache_Controller.MT.Complete_L2_to_L1 45 0.00% 0.00% system.ruby.L1Cache_Controller.MMT.Complete_L2_to_L1 24 0.00% 0.00% -system.ruby.Directory_Controller.GETX 51 0.00% 0.00% -system.ruby.Directory_Controller.GETS 409 0.00% 0.00% -system.ruby.Directory_Controller.PUT 425 0.00% 0.00% -system.ruby.Directory_Controller.UnblockM 440 0.00% 0.00% -system.ruby.Directory_Controller.Writeback_Exclusive_Clean 344 0.00% 0.00% -system.ruby.Directory_Controller.Writeback_Exclusive_Dirty 81 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Data 441 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Ack 81 0.00% 0.00% -system.ruby.Directory_Controller.NO.PUT 425 0.00% 0.00% -system.ruby.Directory_Controller.E.GETX 47 0.00% 0.00% -system.ruby.Directory_Controller.E.GETS 394 0.00% 0.00% -system.ruby.Directory_Controller.NO_B.UnblockM 440 0.00% 0.00% -system.ruby.Directory_Controller.NO_B_W.Memory_Data 441 0.00% 0.00% -system.ruby.Directory_Controller.WB.GETX 4 0.00% 0.00% -system.ruby.Directory_Controller.WB.GETS 14 0.00% 0.00% -system.ruby.Directory_Controller.WB.Writeback_Exclusive_Clean 344 0.00% 0.00% -system.ruby.Directory_Controller.WB.Writeback_Exclusive_Dirty 81 0.00% 0.00% -system.ruby.Directory_Controller.WB_E_W.GETS 1 0.00% 0.00% -system.ruby.Directory_Controller.WB_E_W.Memory_Ack 81 0.00% 0.00% ---------- End Simulation Statistics ---------- |