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AgeCommit message (Expand)Author
2006-12-17Started removing "CodeBlock" objects from the mips isa description.Gabe Black
2006-12-17Compilation fix after messy merge.Gabe Black
2006-12-16Merge zizzer:/bk/newmemGabe Black
2006-12-16Switch the endianness of data that's forwarded. This is the same sort of prob...Gabe Black
2006-12-16Make fetch detect when a branch is happening, rather than trying to compute w...Gabe Black
2006-12-16Accidently "cleaned" away the NPC parameter to the constructor.Gabe Black
2006-12-16Don't have "predict" set the predicted target of the instruction. Do that exp...Gabe Black
2006-12-16Add in constants which let you explicitly check if endian conversion would do...Gabe Black
2006-12-16Add in capability to return to unblocking after a squash. This is needed beca...Gabe Black
2006-12-16Make sure endian conversion is done on the memory data when it's just set to ...Gabe Black
2006-12-16Make the decoder use the new setup in the dyninsts for branch prediction.Gabe Black
2006-12-16Made branch delay slots get squashed, and passed back an NPC and NNPC to star...Gabe Black
2006-12-16Added a predicted NPC field, explicitly stored whether the instruction was pr...Gabe Black
2006-12-16Made changes to CWP be non speculative.Gabe Black
2006-12-16Changes to the isa_parser and affected files to fix an indexing problem with ...Gabe Black
2006-12-15Merge zizzer:/bk/newmemLisa Hsu
2006-12-15Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-15small change to eliminate address range overlap.Lisa Hsu
2006-12-15little fixes i noticed while searching for reason for address range issues (b...Lisa Hsu
2006-12-15Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-15Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-15some small general fixes to make everythign work nicely with other ISAs, now ...Lisa Hsu
2006-12-15loadstore.isa:Lisa Hsu
2006-12-15tlb.cc:Lisa Hsu
2006-12-15Use my range_map to speed up findPort() in the bus. The snoop code could stil...Ali Saidi
2006-12-15Optimized the TLB translations with some cachingAli Saidi
2006-12-14flesh out twinx asisAli Saidi
2006-12-13Split CachePort class into CpuSidePort and MemSidePortSteve Reinhardt
2006-12-13Merge zizzer:/bk/newmemLisa Hsu
2006-12-13fix MiscRegFile::readRegWithEffect, which neglected the MISCREGS.Lisa Hsu
2006-12-13Merge zizzer:/bk/newmemLisa Hsu
2006-12-13Merge zizzer:/bk/sparcfsLisa Hsu
2006-12-12Merge zizzer:/bk/newmemLisa Hsu
2006-12-12Merge zizzer:/bk/newmem/Gabe Black
2006-12-12Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-12-12Fix bugs in tlbmap (and thus rangemap since the code is nearly identical)Ali Saidi
2006-12-12Allow for multiple redirects to happen on a single cycle (only the one for th...Kevin Lim
2006-12-12Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...Steve Reinhardt
2006-12-12If no tests are specified for regression, just build the binariesSteve Reinhardt
2006-12-12Get rid of unused lock code.Steve Reinhardt
2006-12-11Fix up in case a req hasn't yet been generated for this instruction (if there...Kevin Lim
2006-12-11Fix for fetch to use the icache's block size to generate proper access size.Kevin Lim
2006-12-10Merge zizzer.eecs.umich.edu:/z/stever/bk/newmem-headSteve Reinhardt
2006-12-10Reorder CacheTags members for better cache performance.Steve Reinhardt
2006-12-10Get rid of dummy 'hello world' outputs.Steve Reinhardt
2006-12-10Delete parser reference outputs so that test will no longer be run.Steve Reinhardt
2006-12-10Merge zizzer.eecs.umich.edu:/z/stever/bk/newmem-cache2Steve Reinhardt
2006-12-10Add '-j' option directly to regress script (passed to scons).Steve Reinhardt
2006-12-09Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2006-12-09fix lisa's hand mergeAli Saidi