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arm
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types.hh
Age
Commit message (
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Author
2018-06-06
arch-arm: Adjust breakpoint EC depending on source state
Andreas Sandberg
2018-01-20
arm, base: Generalize and move the BitUnion hash struct.
Gabe Black
2018-01-20
base: Rework bitunions so they can be more flexible.
Gabe Black
2017-12-04
misc: Rename misc.(hh|cc) to logging.(hh|cc)
Gabe Black
2017-11-22
arch-arm: Add support for the brk instruction
Andreas Sandberg
2016-01-17
arch: get rid of unused LargestRead typedef
Steve Reinhardt
2015-10-12
misc: Remove redundant compiler-specific defines
Andreas Hansson
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2014-12-23
arm: Raise an alignment fault if a PC has illegal alignment
Andreas Sandberg
2014-11-14
arm: Fixes based on UBSan and static analysis
Andreas Hansson
2014-09-03
arm: Fix ExtMachInst hash operator underlying type
Andreas Hansson
2014-01-24
arm: Add support for ARMv8 (AArch64 & AArch32)
ARM gem5 Developers
2012-06-29
ARM: Fix issue with predicted next pc being wrong because of advance() ordering.
Ali Saidi
2012-05-26
CPU: Merge the predecoder and decoder.
Gabe Black
2012-04-14
clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6
Andreas Hansson
2011-06-19
cpus/isa: add a != operator for pcstate
Korey Sewell
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-04
ARM: Cleanup implementation of ITSTATE and put important code in PCState.
Ali Saidi
2011-03-26
mips: cleanup ISA-specific code
Korey Sewell
2011-03-17
ARM: Identify branches as conditional or unconditional and direct or indirect.
Ali Saidi
2011-02-23
ARM: This panic can be hit during misspeculation so it can't exist.
Ali Saidi
2011-02-23
ARM: Bad interworking warn way to noisy when running real code w/misspeculation.
Ali Saidi
2011-01-18
O3: Fix itstate prediction and recovery.
Matt Horsnell
2010-11-15
ARM: Do something predictable for an UNPREDICTABLE branch.
Ali Saidi
2010-11-08
ARM: Add support for M5 ops in the ARM ISA
Ali Saidi
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-09-14
CPU: Trim unnecessary includes from some common files.
Gabe Black
2010-07-13
ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index.
Gabe Black
2010-06-02
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Gabe Black
2010-06-02
ARM: Add support for VFP vector mode.
Gabe Black
2010-06-02
ARM: Implement a badMode function that says whether a mode is legal.
Gabe Black
2010-06-02
ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.
Gabe Black
2010-06-02
ARM: Hook the new multiply instructions into all the decoders.
Gabe Black
2010-06-02
ARM: Make 32 bit thumb use the new, external load instructions.
Gabe Black
2010-06-02
ARM: Flesh out the 32 bit thumb store single instructions.
Gabe Black
2010-06-02
ARM: Flesh out 32 bit thumb load word decoding.
Gabe Black
2010-06-02
ARM: Add bitfields for 32 bit thumb.
Gabe Black
2010-06-02
ARM: Decode VFP instructions.
Gabe Black
2010-06-02
ARM: Add thumb bitfields to the ExtMachInst and the isa definition.
Gabe Black
2010-06-02
ARM: Add a bitfield for setting the regular, inst bits of an ExtMachInst.
Gabe Black
2010-06-02
ARM: Add a bit to the ExtMachInst to select thumb mode.
Gabe Black
2009-11-17
ARM: Begin implementing CP15
Ali Saidi
2009-11-14
ARM: Add a bitfield to indicate if an immediate should be used.
Gabe Black
2009-11-14
ARM: Move around decoder to properly decode CP15
Ali Saidi
2009-11-10
ARM: Fix some bugs in the ISA desc and fill out some instructions.
Gabe Black
2009-11-08
ARM: Add in more bits for the mon mode.
Gabe Black
2009-07-08
Registers: Add a registers.hh file as an ISA switched header.
Gabe Black
2009-07-08
Registers: Get rid of the float register width parameter.
Gabe Black
2009-07-01
ARM: Get rid of some bitfields that aren't used. A few may need to be readded.
Gabe Black
2009-07-01
ARM: Decode some media instructions. These are untested.
Gabe Black
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