gem5 - gem5

Age	Commit message (Collapse)	Author
2014-10-09	cpu: Remove Ozone CPU from the source tree	Mitch Hayenga
	The Ozone CPU is now very much out of date and completely non-functional, with no one actively working on restoring it. It is a source of confusion for new users who attempt to use it before realizing its current state. RIP
2013-01-07	cpu: Rename defer_registration->switched_out	Andreas Sandberg
	The defer_registration parameter is used to prevent a CPU from initializing at startup, leaving it in the "switched out" mode. The name of this parameter (and the help string) is confusing. This patch renames it to switched_out, which should be more descriptive.
2013-01-07	arch: Make the ISA class inherit from SimObject	Andreas Sandberg
	The ISA class on stores the contents of ID registers on many architectures. In order to make reset values of such registers configurable, we make the class inherit from SimObject, which allows us to use the normal generated parameter headers. This patch introduces a Python helper method, BaseCPU.createThreads(), which creates a set of ISAs for each of the threads in an SMT system. Although it is currently only needed when creating multi-threaded CPUs, it should always be called before instantiating the system as this is an obvious place to configure ID registers identifying a thread/CPU.
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black

2011-04-15	includes: sort all includes	Nathan Binkert

2009-05-26	types: add a type for thread IDs and try to use it everywhere	Nathan Binkert

2008-02-10	Fix #include lines for renamed cache files.	Steve Reinhardt
	--HG-- extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
2007-10-02	CPU: Make the cpuid parameter get set in SE mode as well.	Gabe Black
	--HG-- extra : convert_revision : bc47206acb683ebaaa31f57af79b4b8db64e4d31
2007-10-02	CPU: Make sure the system parameter gets set in the cpu builders. Other ↵	Gabe Black
	parameters need to be fixed as well. --HG-- extra : convert_revision : 0401970a79855ee0a96eb29305346ce07b5c98ea
2007-08-26	Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.	Gabe Black
	--HG-- extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
	creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2006-11-01	Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ↵	Gabe Black
	file functions to not take faults --HG-- extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
2006-06-22	Changes to get OzoneCPU to compile once more.	Kevin Lim
	The changes largely are fixing up the memory accesses to use ports/Requests/Packets, supporting the splitting off of instantiation of template classes, and handling some of the reorganization that happened. OzoneCPU is untested for now but at least compiles. Fixes will be coming shortly. SConstruct: Remove OzoneSimpleCPU from list of CPUs. src/cpu/SConscript: Leave out OzoneSimpleCPU. src/cpu/ozone/bpred_unit.cc: Fixes to get OzoneCPU to compile. src/cpu/ozone/checker_builder.cc: src/cpu/ozone/cpu.cc: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_builder.cc: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/dyn_inst.hh: src/cpu/ozone/dyn_inst_impl.hh: src/cpu/ozone/front_end.cc: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/ozone_impl.hh: src/cpu/ozone/rename_table.cc: src/cpu/ozone/simple_params.hh: src/cpu/ozone/thread_state.hh: Fixes to get OzoneCPU back to compiling. --HG-- extra : convert_revision : 90ffb397263bcf9fea3987317272c64f2b20f7e6