index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
simple
/
base.hh
Age
Commit message (
Expand
)
Author
2008-09-10
style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...
Ali Saidi
2008-08-11
params: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert
2008-07-01
After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFra...
Ali Saidi
2008-02-26
TLB: Make a TLB base class and put a virtual demapPage function in it.
Gabe Black
2008-02-14
CPU: move the PC Events code to a place where the code won't be executed mult...
Ali Saidi
2007-11-15
Get MIPS simple regression working. Take out unecessary functions "setShadowS...
Korey Sewell
2007-11-13
Add in files from merge-bare-iron, get them compiling in FS and SE mode
Korey Sewell
2007-10-18
CPU: Use the ThreadContext cpu id instead of the params cpu id in all cases.
Ali Saidi
2007-08-26
Simple CPU: Make sure only instructions which complete without faulting are c...
Gabe Black
2007-08-26
Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
Gabe Black
2007-08-07
X86: Make a microcode branch microop.
Gabe Black
2007-06-30
Get rid of Packet result field. Error responses are
Steve Reinhardt
2007-06-22
mips import pt. 1
Korey Sewell
2007-06-13
Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "more...
Gabe Black
2007-05-18
Changes to make simple cpu handle pcs appropriately for x86
Gabe Black
2007-03-15
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2007-03-15
Make the predecoder an object with it's own switched header file. Start addin...
Gabe Black
2007-03-13
Replaced makeExtMI with predecode.
Gabe Black
2007-03-07
I missed a couple of WithEffects, this should do it
Ali Saidi
2007-03-07
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
Ali Saidi
2007-02-12
Merge zizzer:/bk/newmem
Ali Saidi
2007-02-12
rename store conditional stuff as extra data so it can be used for conditiona...
Ali Saidi
2007-02-12
Move store conditional result checking from SimpleAtomicCpu write
Steve Reinhardt
2007-01-27
Merge zizzer:/bk/newmem
Gabe Black
2007-01-26
make our code a little more standards compliant
Ali Saidi
2006-12-20
Initial work to make remote gdb available in SE mode. This is completely unte...
Gabe Black
2006-12-16
Changes to the isa_parser and affected files to fix an indexing problem with ...
Gabe Black
2006-12-12
Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(In...
Steve Reinhardt
2006-11-03
Got rid of "inPalMode". Some places are still effectively checking if they ar...
Gabe Black
2006-11-01
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-10-31
Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...
Kevin Lim
2006-10-31
Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...
Gabe Black
2006-10-31
Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...
Gabe Black
2006-10-15
Started implementing microcode.
Gabe Black
2006-07-05
Remove sampler and serializer. Now they are handled through C++ interacting ...
Kevin Lim
2006-06-07
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in ...
Kevin Lim
2006-06-06
Change ExecContext to ThreadContext. This is being renamed to differentiate ...
Kevin Lim
2006-05-31
Updated Authors from bk prs info
Ali Saidi
2006-05-30
Minor further cleanup & commenting of Packet class.
Steve Reinhardt
2006-05-22
New directory structure:
Steve Reinhardt