summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2011-09-01Functional Accesses: Update states to support Broadcast/Snooping protocols.Lisa Hsu
2011-08-29SLICC: Pass arguments by referenceNilay Vaish
2011-08-29Ruby: Remove some unused codeNilay Vaish
2011-08-26Ruby: Eliminate modulo op for computing set size.Nilay Vaish
2011-08-19ARM: Mark some variables uncacheable until boot all CPUs are enabled.Ali Saidi
2011-08-19Mem: Put prefetcher notify call before packet is deleted.Ali Saidi
2011-08-19ARM: Add VExpress_E support with PCIe to gem5Ali Saidi
2011-08-19ARM: Add support for Versatile Express boardsAli Saidi
2011-08-19ARM: Make GIC function that should only be called by GIC protected.Ali Saidi
2011-08-19IDE: Fix issues with new PIIX kernel driver and our model.Ali Saidi
2011-08-19ARM: Add support for DIV/SDIV instructions.Ali Saidi
2011-08-19LSQ: Set store predictor to periodically clear itself as recommended in the s...Ali Saidi
2011-08-19Fix bugs due to interaction between SEV instructions and O3 pipelineGeoffrey Blake
2011-08-19LSQ: Add some better dprintfs for storeset predictor.Mrinmoy Ghosh
2011-08-19LSQ: Fix a few issues with the storeset predictor.Mrinmoy Ghosh
2011-08-19Stats: Add a sparse histogram stat object.Thomas Grass
2011-08-19O3: Squash the violator and younger instructions instead not all insts.Giacomo Gabrielli
2011-08-19ARM: Add per-cpu local timers for ARM.Geoffrey Blake
2011-08-19ARM: Add per-processor interrupt support to GIC.Prakash Ramrakhani
2011-08-19ARM: Fix a memory leak with the table walker.Ali Saidi
2011-08-19Prefetcher: Fix some memory leaks with the prefetcher.Ali Saidi
2011-08-19ARM: quiet what can be a very noise CLCD controller.Ali Saidi
2011-08-16InOrder: Make cache_unit.hh include hashmap.hh explicitly, not transitively.Gabe Black
2011-08-16O3: Make lsq_unit.hh include arch/isa_traits.hh directly, not transitively.Gabe Black
2011-08-15Ruby: Initialize some variables.Nilay Vaish
2011-08-14O3: When squashing, restore the macroop that should be used for fetching.Gabe Black
2011-08-14O3: Add a pointer to the macroop for a microop in the dyninst.Gabe Black
2011-08-13X86: Use IsSquashAfter if an instruction could affect fetch translation.Gabe Black
2011-08-13O3: At the end of an instruction, force fetchAddr to something sensible.Gabe Black
2011-08-09O3: Stop using the current macroop no matter why you're leaving it.Gabe Black
2011-08-09O3: When waiting to handle an interrupt, let everything drain out.Gabe Black
2011-08-08BuildEnv: Eliminate RUBY as build environment variableNilay Vaish
2011-08-07O3: Get rid of the unused addToRemoveList function.Gabe Black
2011-08-07O3: Let squashed and deferred instructions issue.Gabe Black
2011-08-07O3: Fix uninitialized variable in the tournament branch predictor.Ali Saidi
2011-08-07Translation: Use a pointer type as the template argument.Gabe Black
2011-08-03Ruby: Remove files and includes not in useNilay Vaish
2011-08-02O3: Get rid of the raw ExtMachInst constructor on DynInsts.Gabe Black
2011-08-02Scons: Make some Action objects fit the abreviated output format.Gabe Black
2011-08-02Scons: Drop RUBY as compile time option.Nilay Vaish
2011-07-31O3: Implement memory mapped IPRs for O3.Gabe Black
2011-07-30O3: Fix corner case squashing into the microcode ROM.Gabe Black
2011-07-27SLICC: Put functions of a controller in its .cc fileNilay Vaish
2011-07-15Mem: Fix issue with prefetches originating at non-L1 caches getting stale dataAli Saidi
2011-07-15O3: Create a pipeline activity viewer for the O3 CPU model.Giacomo Gabrielli
2011-07-15ARM: Fix SWP/SWPB undefined instruction behaviorWade Walker
2011-07-15ARM: Add two unimplemented miscellaneous registers.Wade Walker
2011-07-11X86: implements copyRegs() functionNilay Vaish
2011-07-11ISA: Get rid of the unused mem_acc_type template parameter.Gabe Black
2011-07-10Branch predictor: Fixes the tournament branch predictor.Mrinmoy Ghosh