From 1a4a617c7e0728508d63a91a8534fbb4583f630c Mon Sep 17 00:00:00 2001 From: Jan-Peter Larsson Date: Thu, 20 Dec 2018 15:55:56 +0000 Subject: dev, arm: Warn on PL011 DMA disable The PL011 spec specifies a DMACR register at offset 0x48, which isn't implemented in the model. Currently any attempt to access the register results in a panic. This change swaps the panic for a warning only when software writes into DMACR to disable DMA, keeping the panic otherwise. Change-Id: I04586b52df8d5d174536276fd7ae19e77ff4681a Reviewed-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/15279 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/dev/arm/pl011.cc | 12 ++++++++++++ src/dev/arm/pl011.hh | 1 + 2 files changed, 13 insertions(+) mode change 100644 => 100755 src/dev/arm/pl011.cc mode change 100644 => 100755 src/dev/arm/pl011.hh diff --git a/src/dev/arm/pl011.cc b/src/dev/arm/pl011.cc old mode 100644 new mode 100755 index fe73d9674..2e80045e4 --- a/src/dev/arm/pl011.cc +++ b/src/dev/arm/pl011.cc @@ -133,6 +133,10 @@ Pl011::read(PacketPtr pkt) DPRINTF(Uart, "Reading Masked Int status as 0x%x\n", maskInt()); data = maskInt(); break; + case UART_DMACR: + warn("PL011: DMA not supported\n"); + data = 0x0; // DMA never enabled + break; default: if (readId(pkt, AMBA_ID, pioAddr)) { // Hack for variable size accesses @@ -239,6 +243,14 @@ Pl011::write(PacketPtr pkt) dataAvailable(); } break; + case UART_DMACR: + // DMA is not supported, so panic if anyome tries to enable it. + // Bits 0, 1, 2 enables DMA on RX, TX, ERR respectively, others res0. + if (data & 0x7) { + panic("Tried to enable DMA on PL011\n"); + } + warn("PL011: DMA not supported\n"); + break; default: panic("Tried to write PL011 at offset %#x that doesn't exist\n", daddr); break; diff --git a/src/dev/arm/pl011.hh b/src/dev/arm/pl011.hh old mode 100644 new mode 100755 index 5a92d8890..dac2f6837 --- a/src/dev/arm/pl011.hh +++ b/src/dev/arm/pl011.hh @@ -135,6 +135,7 @@ class Pl011 : public Uart, public AmbaDevice static const int UART_RIS = 0x03C; static const int UART_MIS = 0x040; static const int UART_ICR = 0x044; + static const int UART_DMACR = 0x048; static const uint16_t UART_RIINTR = 1 << 0; static const uint16_t UART_CTSINTR = 1 << 1; -- cgit v1.2.3