From 2bad5138e4c1802645272a33f9b04859adac8ce2 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 2 Jun 2010 12:58:18 -0500
Subject: ARM TLB: Fix bug in memAttrs getting a bogus thread context

---
 src/arch/arm/table_walker.cc | 8 +++++---
 src/arch/arm/table_walker.hh | 2 +-
 src/arch/arm/tlb.cc          | 2 +-
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index ecdb8a53e..802df8b12 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -150,8 +150,9 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _
 }
 
 void
-TableWalker::memAttrs(TlbEntry &te, uint8_t texcb, bool s)
+TableWalker::memAttrs(ThreadContext *tc, TlbEntry &te, uint8_t texcb, bool s)
 {
+    // Note: tc local variable is hiding tc class variable
     DPRINTF(TLBVerbose, "memAttrs texcb:%d s:%d\n", texcb, s);
     te.shareable = false; // default value
     bool outer_shareable = false;
@@ -221,6 +222,7 @@ TableWalker::memAttrs(TlbEntry &te, uint8_t texcb, bool s)
             panic("More than 32 states for 5 bits?\n");
         }
     } else {
+        assert(tc);
         PRRR prrr = tc->readMiscReg(MISCREG_PRRR);
         NMRR nmrr = tc->readMiscReg(MISCREG_NMRR);
         DPRINTF(TLBVerbose, "memAttrs PRRR:%08x NMRR:%08x\n", prrr, nmrr);
@@ -415,7 +417,7 @@ TableWalker::doL1Descriptor()
         te.ap =  l1Desc.ap();
         te.domain = l1Desc.domain();
         te.asid = contextId;
-        memAttrs(te, l1Desc.texcb(), l1Desc.shareable());
+        memAttrs(tc, te, l1Desc.texcb(), l1Desc.shareable());
 
         DPRINTF(TLB, "Inserting Section Descriptor into TLB\n");
         DPRINTF(TLB, " - N%d pfn:%#x size: %#x global:%d valid: %d\n",
@@ -510,7 +512,7 @@ TableWalker::doL2Descriptor()
     te.xn = l2Desc.xn();
     te.ap = l2Desc.ap();
     te.domain = l1Desc.domain();
-    memAttrs(te, l2Desc.texcb(), l2Desc.shareable());
+    memAttrs(tc, te, l2Desc.texcb(), l2Desc.shareable());
 
     if (!delayed) {
         tc = NULL;
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index fbb9133e1..8612df876 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -313,7 +313,7 @@ class TableWalker : public MemObject
             TLB::Translation *_trans, bool timing);
 
     void setTlb(TLB *_tlb) { tlb = _tlb; }
-    void memAttrs(TlbEntry &te, uint8_t texcb, bool s);
+    void memAttrs(ThreadContext *tc, TlbEntry &te, uint8_t texcb, bool s);
 
   private:
 
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 422ac68f4..acc6b416b 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -387,7 +387,7 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
 
         // Set memory attributes
         TlbEntry temp_te;
-        tableWalker->memAttrs(temp_te, 0, 1);
+        tableWalker->memAttrs(tc, temp_te, 0, 1);
         temp_te.shareable = true;
         DPRINTF(TLBVerbose, "(No MMU) setting memory attributes: shareable:\
                 %d, innerAttrs: %d, outerAttrs: %d\n", temp_te.shareable,
-- 
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