From 4c9ba9cd2925c83889c6388b4f5a15820bd9986b Mon Sep 17 00:00:00 2001
From: Andreas Sandberg <andreas.sandberg@arm.com>
Date: Thu, 23 Mar 2017 18:54:56 +0000
Subject: arm: Use the interrupt adaptor in the PMU

Rewrite interrupt handling in the PMU model to use the new interrupt
adaptor.

Change-Id: I2cbb99580c46d3e21a1335b897843b7b6e41f10c
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12400
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
---
 src/arch/arm/ArmPMU.py |  4 ++--
 src/arch/arm/pmu.cc    | 30 +++++++++++++++++++-----------
 src/arch/arm/pmu.hh    |  9 +++++----
 3 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/src/arch/arm/ArmPMU.py b/src/arch/arm/ArmPMU.py
index 9da3de28a..cb37ff88c 100644
--- a/src/arch/arm/ArmPMU.py
+++ b/src/arch/arm/ArmPMU.py
@@ -42,6 +42,7 @@ from m5.SimObject import *
 from m5.params import *
 from m5.params import isNullPointer
 from m5.proxy import *
+from Gic import ArmInterruptPin
 
 class ProbeEvent(object):
     def __init__(self, pmu, _eventId, obj, *listOfNames):
@@ -67,7 +68,6 @@ class SoftwareIncrement(object):
 ARCH_EVENT_CORE_CYCLES = 0x11
 
 class ArmPMU(SimObject):
-
     type = 'ArmPMU'
     cxx_class = 'ArmISA::PMU'
     cxx_header = 'arch/arm/pmu.hh'
@@ -174,4 +174,4 @@ class ArmPMU(SimObject):
     cycleEventId = Param.Int(ARCH_EVENT_CORE_CYCLES, "Cycle event id")
     platform = Param.Platform(Parent.any, "Platform this device is part of.")
     eventCounters = Param.Int(31, "Number of supported PMU counters")
-    pmuInterrupt = Param.Int(68, "PMU GIC interrupt number")
+    interrupt = Param.ArmInterruptPin("PMU interrupt")
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index 0bdae4936..13b23c745 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2014, 2017 ARM Limited
+ * Copyright (c) 2011-2014, 2017-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -50,7 +50,6 @@
 #include "debug/PMUVerbose.hh"
 #include "dev/arm/base_gic.hh"
 #include "dev/arm/generic_timer.hh"
-#include "dev/arm/realview.hh"
 #include "params/ArmPMU.hh"
 
 namespace ArmISA {
@@ -68,8 +67,7 @@ PMU::PMU(const ArmPMUParams *p)
       cycleCounterEventId(p->cycleEventId),
       swIncrementEvent(nullptr),
       reg_pmcr_conf(0),
-      pmuInterrupt(p->pmuInterrupt),
-      platform(p->platform)
+      interrupt(p->interrupt)
 {
     DPRINTF(PMUVerbose, "Initializing the PMU.\n");
 
@@ -78,6 +76,9 @@ PMU::PMU(const ArmPMUParams *p)
               maximumCounterCount);
     }
 
+    warn_if(!interrupt, "ARM PMU: No interrupt specified, interrupt " \
+            "delivery disabled.\n");
+
     /* Setup the performance counter ID registers */
     reg_pmcr_conf.imp = 0x41;    // ARM Ltd.
     reg_pmcr_conf.idcode = 0x00;
@@ -92,6 +93,14 @@ PMU::~PMU()
 {
 }
 
+void
+PMU::setThreadContext(ThreadContext *tc)
+{
+    DPRINTF(PMUVerbose, "Assigning PMU to ContextID %i.\n", tc->contextId());
+    if (interrupt)
+        interrupt->setThreadContext(tc);
+}
+
 void
 PMU::addSoftwareIncrementEvent(unsigned int id)
 {
@@ -638,14 +647,13 @@ PMU::setCounterTypeRegister(CounterId id, PMEVTYPER_t val)
 void
 PMU::raiseInterrupt()
 {
-    RealView *rv(dynamic_cast<RealView *>(platform));
-    if (!rv || !rv->gic) {
-        warn_once("ARM PMU: GIC missing, can't raise interrupt.\n");
-        return;
+    if (interrupt) {
+        DPRINTF(PMUVerbose, "Delivering PMU interrupt.\n");
+        interrupt->raise();
+    } else {
+        warn_once("Dropping PMU interrupt as no interrupt has "
+                  "been specified\n");
     }
-
-    DPRINTF(PMUVerbose, "Delivering PMU interrupt.\n");
-    rv->gic->sendInt(pmuInterrupt);
 }
 
 void
diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh
index 7090b4a78..61516cffd 100644
--- a/src/arch/arm/pmu.hh
+++ b/src/arch/arm/pmu.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2014, 2017 ARM Limited
+ * Copyright (c) 2011-2014, 2017-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -58,6 +58,7 @@
 class ArmPMUParams;
 class Platform;
 class ThreadContext;
+class ArmInterruptPin;
 
 namespace ArmISA {
 
@@ -112,6 +113,8 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
     void regProbeListeners() override;
 
   public: // ISA Device interface
+    void setThreadContext(ThreadContext *tc) override;
+
     /**
      * Set a register within the PMU.
      *
@@ -599,9 +602,7 @@ class PMU : public SimObject, public ArmISA::BaseISADevice {
     static const MiscReg reg_pmcr_wr_mask;
 
     /** Performance monitor interrupt number */
-    const unsigned int pmuInterrupt;
-    /** Platform this device belongs to */
-    Platform *const platform;
+    ArmInterruptPin *const interrupt;
 
     /**
      * List of event types supported by this PMU.
-- 
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