From 56865ad1154c7c3fde2ae6b7329d0c888390f781 Mon Sep 17 00:00:00 2001 From: Nikos Nikoleris Date: Thu, 3 May 2018 12:14:41 +0100 Subject: mem-cache: Fix include directives in the cache related classes Change-Id: I111b0f662897c43974aadb08da1ed85c7542585c Reviewed-on: https://gem5-review.googlesource.com/10433 Reviewed-by: Daniel Carvalho Reviewed-by: Jason Lowe-Power Maintainer: Nikos Nikoleris --- src/mem/cache/blk.hh | 5 +++++ src/mem/cache/mshr.cc | 6 +++--- src/mem/cache/mshr.hh | 6 ++++++ src/mem/cache/mshr_queue.cc | 4 ++++ src/mem/cache/mshr_queue.hh | 4 +++- src/mem/cache/prefetch/base.cc | 3 ++- src/mem/cache/prefetch/base.hh | 7 ++++++- src/mem/cache/prefetch/queued.cc | 7 ++++++- src/mem/cache/prefetch/queued.hh | 8 +++++++- src/mem/cache/prefetch/stride.cc | 5 +++++ src/mem/cache/prefetch/stride.hh | 6 +++++- src/mem/cache/prefetch/tagged.cc | 2 ++ src/mem/cache/prefetch/tagged.hh | 3 ++- src/mem/cache/queue.hh | 4 ++++ src/mem/cache/queue_entry.hh | 1 + src/mem/cache/replacement_policies/bip_rp.cc | 1 + src/mem/cache/replacement_policies/bip_rp.hh | 3 ++- src/mem/cache/replacement_policies/brrip_rp.cc | 2 ++ src/mem/cache/replacement_policies/brrip_rp.hh | 3 ++- src/mem/cache/replacement_policies/fifo_rp.cc | 3 +++ src/mem/cache/replacement_policies/fifo_rp.hh | 4 +++- src/mem/cache/replacement_policies/lfu_rp.cc | 3 +++ src/mem/cache/replacement_policies/lfu_rp.hh | 3 ++- src/mem/cache/replacement_policies/lru_rp.cc | 3 +++ src/mem/cache/replacement_policies/lru_rp.hh | 3 ++- src/mem/cache/replacement_policies/mru_rp.cc | 3 +++ src/mem/cache/replacement_policies/mru_rp.hh | 4 +++- src/mem/cache/replacement_policies/random_rp.cc | 5 ++++- src/mem/cache/replacement_policies/random_rp.hh | 3 ++- src/mem/cache/replacement_policies/second_chance_rp.cc | 4 ++++ src/mem/cache/replacement_policies/second_chance_rp.hh | 4 +++- src/mem/cache/tags/base.cc | 7 +++++++ src/mem/cache/tags/base.hh | 5 ++++- src/mem/cache/tags/base_set_assoc.cc | 2 ++ src/mem/cache/tags/base_set_assoc.hh | 5 +++-- src/mem/cache/tags/cacheset.hh | 3 +++ src/mem/cache/tags/fa_lru.cc | 1 + src/mem/cache/tags/fa_lru.hh | 8 ++++++-- src/mem/cache/write_queue.cc | 4 ++++ src/mem/cache/write_queue.hh | 4 +++- src/mem/cache/write_queue_entry.cc | 7 ++----- src/mem/cache/write_queue_entry.hh | 6 ++++++ 42 files changed, 144 insertions(+), 30 deletions(-) diff --git a/src/mem/cache/blk.hh b/src/mem/cache/blk.hh index 561d50282..951abd5be 100644 --- a/src/mem/cache/blk.hh +++ b/src/mem/cache/blk.hh @@ -48,9 +48,14 @@ #ifndef __MEM_CACHE_BLK_HH__ #define __MEM_CACHE_BLK_HH__ +#include +#include +#include #include +#include #include "base/printable.hh" +#include "base/types.hh" #include "mem/cache/replacement_policies/base.hh" #include "mem/packet.hh" #include "mem/request.hh" diff --git a/src/mem/cache/mshr.cc b/src/mem/cache/mshr.cc index f5b346ee8..dc490790b 100644 --- a/src/mem/cache/mshr.cc +++ b/src/mem/cache/mshr.cc @@ -49,15 +49,15 @@ #include "mem/cache/mshr.hh" -#include #include #include -#include #include "base/logging.hh" +#include "base/trace.hh" #include "base/types.hh" #include "debug/Cache.hh" -#include "mem/cache/cache.hh" +#include "mem/cache/base.hh" +#include "mem/request.hh" #include "sim/core.hh" MSHR::MSHR() : downstreamPending(false), diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh index c4c764068..5c5a9e8d1 100644 --- a/src/mem/cache/mshr.hh +++ b/src/mem/cache/mshr.hh @@ -48,10 +48,16 @@ #ifndef __MEM_CACHE_MSHR_HH__ #define __MEM_CACHE_MSHR_HH__ +#include +#include #include +#include #include "base/printable.hh" +#include "base/types.hh" #include "mem/cache/queue_entry.hh" +#include "mem/packet.hh" +#include "sim/core.hh" class BaseCache; diff --git a/src/mem/cache/mshr_queue.cc b/src/mem/cache/mshr_queue.cc index 29358d737..e44a21954 100644 --- a/src/mem/cache/mshr_queue.cc +++ b/src/mem/cache/mshr_queue.cc @@ -47,6 +47,10 @@ #include "mem/cache/mshr_queue.hh" +#include + +#include "mem/cache/mshr.hh" + MSHRQueue::MSHRQueue(const std::string &_label, int num_entries, int reserve, int demand_reserve) : Queue(_label, num_entries, reserve), diff --git a/src/mem/cache/mshr_queue.hh b/src/mem/cache/mshr_queue.hh index f0b5c2ab0..1b960a5a2 100644 --- a/src/mem/cache/mshr_queue.hh +++ b/src/mem/cache/mshr_queue.hh @@ -48,10 +48,12 @@ #ifndef __MEM_CACHE_MSHR_QUEUE_HH__ #define __MEM_CACHE_MSHR_QUEUE_HH__ -#include +#include +#include "base/types.hh" #include "mem/cache/mshr.hh" #include "mem/cache/queue.hh" +#include "mem/packet.hh" /** * A Class for maintaining a list of pending and allocated memory requests. diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc index 90c6742f9..22a12ba5f 100644 --- a/src/mem/cache/prefetch/base.cc +++ b/src/mem/cache/prefetch/base.cc @@ -48,10 +48,11 @@ #include "mem/cache/prefetch/base.hh" -#include +#include #include "base/intmath.hh" #include "mem/cache/base.hh" +#include "params/BasePrefetcher.hh" #include "sim/system.hh" BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p) diff --git a/src/mem/cache/prefetch/base.hh b/src/mem/cache/prefetch/base.hh index 3b2310621..cc54ab1b8 100644 --- a/src/mem/cache/prefetch/base.hh +++ b/src/mem/cache/prefetch/base.hh @@ -49,12 +49,17 @@ #ifndef __MEM_CACHE_PREFETCH_BASE_HH__ #define __MEM_CACHE_PREFETCH_BASE_HH__ +#include + #include "base/statistics.hh" +#include "base/types.hh" #include "mem/packet.hh" -#include "params/BasePrefetcher.hh" +#include "mem/request.hh" #include "sim/clocked_object.hh" class BaseCache; +struct BasePrefetcherParams; +class System; class BasePrefetcher : public ClockedObject { diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc index 4a685d884..bf3a384ea 100644 --- a/src/mem/cache/prefetch/queued.cc +++ b/src/mem/cache/prefetch/queued.cc @@ -39,8 +39,13 @@ #include "mem/cache/prefetch/queued.hh" +#include + +#include "base/logging.hh" +#include "base/trace.hh" #include "debug/HWPrefetch.hh" -#include "mem/cache/base.hh" +#include "mem/request.hh" +#include "params/QueuedPrefetcher.hh" QueuedPrefetcher::QueuedPrefetcher(const QueuedPrefetcherParams *p) : BasePrefetcher(p), queueSize(p->queue_size), latency(p->latency), diff --git a/src/mem/cache/prefetch/queued.hh b/src/mem/cache/prefetch/queued.hh index 108891fcc..bb38377c1 100644 --- a/src/mem/cache/prefetch/queued.hh +++ b/src/mem/cache/prefetch/queued.hh @@ -40,10 +40,16 @@ #ifndef __MEM_CACHE_PREFETCH_QUEUED_HH__ #define __MEM_CACHE_PREFETCH_QUEUED_HH__ +#include #include +#include +#include "base/statistics.hh" +#include "base/types.hh" #include "mem/cache/prefetch/base.hh" -#include "params/QueuedPrefetcher.hh" +#include "mem/packet.hh" + +struct QueuedPrefetcherParams; class QueuedPrefetcher : public BasePrefetcher { diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc index f2679a292..efe982af2 100644 --- a/src/mem/cache/prefetch/stride.cc +++ b/src/mem/cache/prefetch/stride.cc @@ -48,9 +48,14 @@ #include "mem/cache/prefetch/stride.hh" +#include + +#include "base/intmath.hh" +#include "base/logging.hh" #include "base/random.hh" #include "base/trace.hh" #include "debug/HWPrefetch.hh" +#include "params/StridePrefetcher.hh" StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p) : QueuedPrefetcher(p), diff --git a/src/mem/cache/prefetch/stride.hh b/src/mem/cache/prefetch/stride.hh index be6e41d0a..55cdbc86d 100644 --- a/src/mem/cache/prefetch/stride.hh +++ b/src/mem/cache/prefetch/stride.hh @@ -48,10 +48,14 @@ #ifndef __MEM_CACHE_PREFETCH_STRIDE_HH__ #define __MEM_CACHE_PREFETCH_STRIDE_HH__ +#include #include +#include "base/types.hh" #include "mem/cache/prefetch/queued.hh" -#include "params/StridePrefetcher.hh" +#include "mem/packet.hh" + +struct StridePrefetcherParams; class StridePrefetcher : public QueuedPrefetcher { diff --git a/src/mem/cache/prefetch/tagged.cc b/src/mem/cache/prefetch/tagged.cc index 32a5b47f8..abe6b9dca 100644 --- a/src/mem/cache/prefetch/tagged.cc +++ b/src/mem/cache/prefetch/tagged.cc @@ -35,6 +35,8 @@ #include "mem/cache/prefetch/tagged.hh" +#include "params/TaggedPrefetcher.hh" + TaggedPrefetcher::TaggedPrefetcher(const TaggedPrefetcherParams *p) : QueuedPrefetcher(p), degree(p->degree) { diff --git a/src/mem/cache/prefetch/tagged.hh b/src/mem/cache/prefetch/tagged.hh index 02debe91a..95162aa45 100644 --- a/src/mem/cache/prefetch/tagged.hh +++ b/src/mem/cache/prefetch/tagged.hh @@ -37,8 +37,9 @@ #define __MEM_CACHE_PREFETCH_TAGGED_HH__ #include "mem/cache/prefetch/queued.hh" -#include "params/TaggedPrefetcher.hh" +#include "mem/packet.hh" +struct TaggedPrefetcherParams; class TaggedPrefetcher : public QueuedPrefetcher { diff --git a/src/mem/cache/queue.hh b/src/mem/cache/queue.hh index f603ea84e..8e5ccf1f4 100644 --- a/src/mem/cache/queue.hh +++ b/src/mem/cache/queue.hh @@ -50,10 +50,14 @@ #define __MEM_CACHE_QUEUE_HH__ #include +#include #include "base/trace.hh" +#include "base/types.hh" #include "debug/Drain.hh" #include "mem/cache/queue_entry.hh" +#include "mem/packet.hh" +#include "sim/core.hh" #include "sim/drain.hh" /** diff --git a/src/mem/cache/queue_entry.hh b/src/mem/cache/queue_entry.hh index 8923d860b..7ab9e4f29 100644 --- a/src/mem/cache/queue_entry.hh +++ b/src/mem/cache/queue_entry.hh @@ -49,6 +49,7 @@ #ifndef __MEM_CACHE_QUEUE_ENTRY_HH__ #define __MEM_CACHE_QUEUE_ENTRY_HH__ +#include "base/types.hh" #include "mem/packet.hh" class BaseCache; diff --git a/src/mem/cache/replacement_policies/bip_rp.cc b/src/mem/cache/replacement_policies/bip_rp.cc index 4a3a516f4..93143cacd 100644 --- a/src/mem/cache/replacement_policies/bip_rp.cc +++ b/src/mem/cache/replacement_policies/bip_rp.cc @@ -33,6 +33,7 @@ #include #include "base/random.hh" +#include "params/BIPRP.hh" BIPRP::BIPRP(const Params *p) : LRURP(p), btp(p->btp) diff --git a/src/mem/cache/replacement_policies/bip_rp.hh b/src/mem/cache/replacement_policies/bip_rp.hh index ac4db02e0..aa8df05f2 100644 --- a/src/mem/cache/replacement_policies/bip_rp.hh +++ b/src/mem/cache/replacement_policies/bip_rp.hh @@ -45,7 +45,8 @@ #define __MEM_CACHE_REPLACEMENT_POLICIES_BIP_RP_HH__ #include "mem/cache/replacement_policies/lru_rp.hh" -#include "params/BIPRP.hh" + +struct BIPRPParams; class BIPRP : public LRURP { diff --git a/src/mem/cache/replacement_policies/brrip_rp.cc b/src/mem/cache/replacement_policies/brrip_rp.cc index 846b4fb9c..dc41d8b6b 100644 --- a/src/mem/cache/replacement_policies/brrip_rp.cc +++ b/src/mem/cache/replacement_policies/brrip_rp.cc @@ -30,10 +30,12 @@ #include "mem/cache/replacement_policies/brrip_rp.hh" +#include #include #include "base/logging.hh" // For fatal_if #include "base/random.hh" +#include "params/BRRIPRP.hh" BRRIPRP::BRRIPRP(const Params *p) : BaseReplacementPolicy(p), diff --git a/src/mem/cache/replacement_policies/brrip_rp.hh b/src/mem/cache/replacement_policies/brrip_rp.hh index e442d85ce..9374742c1 100644 --- a/src/mem/cache/replacement_policies/brrip_rp.hh +++ b/src/mem/cache/replacement_policies/brrip_rp.hh @@ -55,7 +55,8 @@ #define __MEM_CACHE_REPLACEMENT_POLICIES_BRRIP_RP_HH__ #include "mem/cache/replacement_policies/base.hh" -#include "params/BRRIPRP.hh" + +struct BRRIPRPParams; class BRRIPRP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/fifo_rp.cc b/src/mem/cache/replacement_policies/fifo_rp.cc index 731945a0a..7c5ce02fe 100644 --- a/src/mem/cache/replacement_policies/fifo_rp.cc +++ b/src/mem/cache/replacement_policies/fifo_rp.cc @@ -30,8 +30,11 @@ #include "mem/cache/replacement_policies/fifo_rp.hh" +#include #include +#include "params/FIFORP.hh" + FIFORP::FIFORP(const Params *p) : BaseReplacementPolicy(p) { diff --git a/src/mem/cache/replacement_policies/fifo_rp.hh b/src/mem/cache/replacement_policies/fifo_rp.hh index 34067d50f..77ff5d489 100644 --- a/src/mem/cache/replacement_policies/fifo_rp.hh +++ b/src/mem/cache/replacement_policies/fifo_rp.hh @@ -38,8 +38,10 @@ #ifndef __MEM_CACHE_REPLACEMENT_POLICIES_FIFO_RP_HH__ #define __MEM_CACHE_REPLACEMENT_POLICIES_FIFO_RP_HH__ +#include "base/types.hh" #include "mem/cache/replacement_policies/base.hh" -#include "params/FIFORP.hh" + +struct FIFORPParams; class FIFORP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/lfu_rp.cc b/src/mem/cache/replacement_policies/lfu_rp.cc index ffa653e87..299c74d82 100644 --- a/src/mem/cache/replacement_policies/lfu_rp.cc +++ b/src/mem/cache/replacement_policies/lfu_rp.cc @@ -30,8 +30,11 @@ #include "mem/cache/replacement_policies/lfu_rp.hh" +#include #include +#include "params/LFURP.hh" + LFURP::LFURP(const Params *p) : BaseReplacementPolicy(p) { diff --git a/src/mem/cache/replacement_policies/lfu_rp.hh b/src/mem/cache/replacement_policies/lfu_rp.hh index 8709e35d4..0c184c4a5 100644 --- a/src/mem/cache/replacement_policies/lfu_rp.hh +++ b/src/mem/cache/replacement_policies/lfu_rp.hh @@ -40,7 +40,8 @@ #define __MEM_CACHE_REPLACEMENT_POLICIES_LFU_RP_HH__ #include "mem/cache/replacement_policies/base.hh" -#include "params/LFURP.hh" + +struct LFURPParams; class LFURP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/lru_rp.cc b/src/mem/cache/replacement_policies/lru_rp.cc index 99e35db19..9e7dcb525 100644 --- a/src/mem/cache/replacement_policies/lru_rp.cc +++ b/src/mem/cache/replacement_policies/lru_rp.cc @@ -30,8 +30,11 @@ #include "mem/cache/replacement_policies/lru_rp.hh" +#include #include +#include "params/LRURP.hh" + LRURP::LRURP(const Params *p) : BaseReplacementPolicy(p) { diff --git a/src/mem/cache/replacement_policies/lru_rp.hh b/src/mem/cache/replacement_policies/lru_rp.hh index e8e708f1c..1b8a396b6 100644 --- a/src/mem/cache/replacement_policies/lru_rp.hh +++ b/src/mem/cache/replacement_policies/lru_rp.hh @@ -39,7 +39,8 @@ #define __MEM_CACHE_REPLACEMENT_POLICIES_LRU_RP_HH__ #include "mem/cache/replacement_policies/base.hh" -#include "params/LRURP.hh" + +struct LRURPParams; class LRURP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/mru_rp.cc b/src/mem/cache/replacement_policies/mru_rp.cc index ff84fc368..b2e019f9a 100644 --- a/src/mem/cache/replacement_policies/mru_rp.cc +++ b/src/mem/cache/replacement_policies/mru_rp.cc @@ -30,8 +30,11 @@ #include "mem/cache/replacement_policies/mru_rp.hh" +#include #include +#include "params/MRURP.hh" + MRURP::MRURP(const Params *p) : BaseReplacementPolicy(p) { diff --git a/src/mem/cache/replacement_policies/mru_rp.hh b/src/mem/cache/replacement_policies/mru_rp.hh index 11cc272a4..a95da04a2 100644 --- a/src/mem/cache/replacement_policies/mru_rp.hh +++ b/src/mem/cache/replacement_policies/mru_rp.hh @@ -38,8 +38,10 @@ #ifndef __MEM_CACHE_REPLACEMENT_POLICIES_MRU_RP_HH__ #define __MEM_CACHE_REPLACEMENT_POLICIES_MRU_RP_HH__ +#include "base/types.hh" #include "mem/cache/replacement_policies/base.hh" -#include "params/MRURP.hh" + +struct MRURPParams; class MRURP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/random_rp.cc b/src/mem/cache/replacement_policies/random_rp.cc index 6a0f353b7..c34d7ac33 100644 --- a/src/mem/cache/replacement_policies/random_rp.cc +++ b/src/mem/cache/replacement_policies/random_rp.cc @@ -30,8 +30,11 @@ #include "mem/cache/replacement_policies/random_rp.hh" +#include +#include + #include "base/random.hh" -#include "mem/cache/blk.hh" +#include "params/RandomRP.hh" RandomRP::RandomRP(const Params *p) : BaseReplacementPolicy(p) diff --git a/src/mem/cache/replacement_policies/random_rp.hh b/src/mem/cache/replacement_policies/random_rp.hh index 5514961b6..bbceaab56 100644 --- a/src/mem/cache/replacement_policies/random_rp.hh +++ b/src/mem/cache/replacement_policies/random_rp.hh @@ -38,7 +38,8 @@ #define __MEM_CACHE_REPLACEMENT_POLICIES_RANDOM_RP_HH__ #include "mem/cache/replacement_policies/base.hh" -#include "params/RandomRP.hh" + +struct RandomRPParams; class RandomRP : public BaseReplacementPolicy { diff --git a/src/mem/cache/replacement_policies/second_chance_rp.cc b/src/mem/cache/replacement_policies/second_chance_rp.cc index 2560a9846..64e667fe6 100644 --- a/src/mem/cache/replacement_policies/second_chance_rp.cc +++ b/src/mem/cache/replacement_policies/second_chance_rp.cc @@ -30,6 +30,10 @@ #include "mem/cache/replacement_policies/second_chance_rp.hh" +#include + +#include "params/SecondChanceRP.hh" + SecondChanceRP::SecondChanceRP(const Params *p) : FIFORP(p) { diff --git a/src/mem/cache/replacement_policies/second_chance_rp.hh b/src/mem/cache/replacement_policies/second_chance_rp.hh index 5522d5e7f..84970e4a8 100644 --- a/src/mem/cache/replacement_policies/second_chance_rp.hh +++ b/src/mem/cache/replacement_policies/second_chance_rp.hh @@ -40,8 +40,10 @@ #ifndef __MEM_CACHE_REPLACEMENT_POLICIES_SECOND_CHANCE_RP_HH__ #define __MEM_CACHE_REPLACEMENT_POLICIES_SECOND_CHANCE_RP_HH__ +#include "mem/cache/replacement_policies/base.hh" #include "mem/cache/replacement_policies/fifo_rp.hh" -#include "params/SecondChanceRP.hh" + +struct SecondChanceRPParams; class SecondChanceRP : public FIFORP { diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc index 7d0a93989..c7ea17bd1 100644 --- a/src/mem/cache/tags/base.cc +++ b/src/mem/cache/tags/base.cc @@ -48,8 +48,15 @@ #include "mem/cache/tags/base.hh" +#include + +#include "base/types.hh" #include "mem/cache/base.hh" +#include "mem/packet.hh" +#include "mem/request.hh" +#include "sim/core.hh" #include "sim/sim_exit.hh" +#include "sim/system.hh" BaseTags::BaseTags(const Params *p) : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh index 47bab4323..806f63aae 100644 --- a/src/mem/cache/tags/base.hh +++ b/src/mem/cache/tags/base.hh @@ -49,12 +49,15 @@ #ifndef __MEM_CACHE_TAGS_BASE_HH__ #define __MEM_CACHE_TAGS_BASE_HH__ +#include #include #include "base/callback.hh" +#include "base/logging.hh" #include "base/statistics.hh" +#include "base/types.hh" #include "mem/cache/blk.hh" -#include "mem/cache/replacement_policies/base.hh" +#include "mem/packet.hh" #include "params/BaseTags.hh" #include "sim/clocked_object.hh" diff --git a/src/mem/cache/tags/base_set_assoc.cc b/src/mem/cache/tags/base_set_assoc.cc index 5888d1f00..d3420b440 100644 --- a/src/mem/cache/tags/base_set_assoc.cc +++ b/src/mem/cache/tags/base_set_assoc.cc @@ -47,9 +47,11 @@ #include "mem/cache/tags/base_set_assoc.hh" +#include #include #include "base/intmath.hh" +#include "mem/request.hh" BaseSetAssoc::BaseSetAssoc(const Params *p) :BaseTags(p), assoc(p->assoc), allocAssoc(p->assoc), diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh index 5a3e832c1..bf227c067 100644 --- a/src/mem/cache/tags/base_set_assoc.hh +++ b/src/mem/cache/tags/base_set_assoc.hh @@ -48,10 +48,11 @@ #ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__ #define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__ -#include -#include +#include #include +#include "base/logging.hh" +#include "base/types.hh" #include "debug/CacheRepl.hh" #include "mem/cache/base.hh" #include "mem/cache/blk.hh" diff --git a/src/mem/cache/tags/cacheset.hh b/src/mem/cache/tags/cacheset.hh index 5a3445659..2675d45ee 100644 --- a/src/mem/cache/tags/cacheset.hh +++ b/src/mem/cache/tags/cacheset.hh @@ -49,6 +49,9 @@ #define __MEM_CACHE_TAGS_CACHESET_HH__ #include +#include + +#include "base/types.hh" /** * An associative set of cache blocks. diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 6abae2bb9..29dab3b64 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -53,6 +53,7 @@ #include "base/intmath.hh" #include "base/logging.hh" +#include "mem/cache/base.hh" FALRU::FALRU(const Params *p) : BaseTags(p), diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh index bec98e3a7..98a64577e 100644 --- a/src/mem/cache/tags/fa_lru.hh +++ b/src/mem/cache/tags/fa_lru.hh @@ -49,11 +49,15 @@ #ifndef __MEM_CACHE_TAGS_FA_LRU_HH__ #define __MEM_CACHE_TAGS_FA_LRU_HH__ -#include +#include +#include #include +#include "base/bitfield.hh" #include "base/intmath.hh" -#include "mem/cache/base.hh" +#include "base/logging.hh" +#include "base/statistics.hh" +#include "base/types.hh" #include "mem/cache/blk.hh" #include "mem/cache/tags/base.hh" #include "mem/packet.hh" diff --git a/src/mem/cache/write_queue.cc b/src/mem/cache/write_queue.cc index 13e0fc519..11a2620df 100644 --- a/src/mem/cache/write_queue.cc +++ b/src/mem/cache/write_queue.cc @@ -48,6 +48,10 @@ #include "mem/cache/write_queue.hh" +#include + +#include "mem/cache/write_queue_entry.hh" + WriteQueue::WriteQueue(const std::string &_label, int num_entries, int reserve) : Queue(_label, num_entries, reserve) diff --git a/src/mem/cache/write_queue.hh b/src/mem/cache/write_queue.hh index 006d70556..d9ace0d81 100644 --- a/src/mem/cache/write_queue.hh +++ b/src/mem/cache/write_queue.hh @@ -45,10 +45,12 @@ #ifndef __MEM_CACHE_WRITE_QUEUE_HH__ #define __MEM_CACHE_WRITE_QUEUE_HH__ -#include +#include +#include "base/types.hh" #include "mem/cache/queue.hh" #include "mem/cache/write_queue_entry.hh" +#include "mem/packet.hh" /** * A write queue for all eviction packets, i.e. writebacks and clean diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc index 4aa174b5a..e393731b7 100644 --- a/src/mem/cache/write_queue_entry.cc +++ b/src/mem/cache/write_queue_entry.cc @@ -50,16 +50,13 @@ #include "mem/cache/write_queue_entry.hh" -#include #include #include -#include #include "base/logging.hh" #include "base/types.hh" -#include "debug/Cache.hh" -#include "mem/cache/cache.hh" -#include "sim/core.hh" +#include "mem/cache/base.hh" +#include "mem/request.hh" inline void WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime, diff --git a/src/mem/cache/write_queue_entry.hh b/src/mem/cache/write_queue_entry.hh index 40079b4ca..5a4b5a820 100644 --- a/src/mem/cache/write_queue_entry.hh +++ b/src/mem/cache/write_queue_entry.hh @@ -49,10 +49,16 @@ #ifndef __MEM_CACHE_WRITE_QUEUE_ENTRY_HH__ #define __MEM_CACHE_WRITE_QUEUE_ENTRY_HH__ +#include +#include #include +#include #include "base/printable.hh" +#include "base/types.hh" #include "mem/cache/queue_entry.hh" +#include "mem/packet.hh" +#include "sim/core.hh" class BaseCache; -- cgit v1.2.3