From 64599080697a8db49b7e28609927bb4c1ed3c05e Mon Sep 17 00:00:00 2001
From: Andreas Sandberg <Andreas.Sandberg@ARM.com>
Date: Thu, 25 Oct 2012 14:08:29 +0100
Subject: arm: Don't export private GIC methods

---
 src/dev/arm/gic_pl390.hh | 46 ++++++++++++++++++++++++++--------------------
 1 file changed, 26 insertions(+), 20 deletions(-)

diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh
index cc6e24d1c..c2b0988f8 100644
--- a/src/dev/arm/gic_pl390.hh
+++ b/src/dev/arm/gic_pl390.hh
@@ -256,6 +256,7 @@ class Pl390 : public BaseGic
     }
     Pl390(const Params *p);
 
+    /** @{ */
     /** Return the address ranges used by the Gic
      * This is the distributor address + all cpu addresses
      */
@@ -270,27 +271,9 @@ class Pl390 : public BaseGic
      * writeDistributor() or writeCpu()
      */
     virtual Tick write(PacketPtr pkt);
+    /** @} */
 
-    /** Handle a read to the distributor poriton of the GIC
-     * @param pkt packet to respond to
-     */
-    Tick readDistributor(PacketPtr pkt);
-
-    /** Handle a read to the cpu poriton of the GIC
-     * @param pkt packet to respond to
-     */
-    Tick readCpu(PacketPtr pkt);
-
-    /** Handle a write to the distributor poriton of the GIC
-     * @param pkt packet to respond to
-     */
-    Tick writeDistributor(PacketPtr pkt);
-
-    /** Handle a write to the cpu poriton of the GIC
-     * @param pkt packet to respond to
-     */
-    Tick writeCpu(PacketPtr pkt);
-
+    /** @{ */
     /** Post an interrupt from a device that is connected to the Gic.
      * Depending on the configuration, the gic will pass this interrupt
      * on through to a CPU.
@@ -304,16 +287,39 @@ class Pl390 : public BaseGic
      * Depending on the configuration, the gic may de-assert it's cpu line
      * @param number number of interrupt to send */
     void clearInt(uint32_t number);
+    /** @} */
 
+    /** @{ */
     /* Various functions fer testing and debugging */
     void driveSPI(uint32_t spi);
     void driveLegIRQ(bool state);
     void driveLegFIQ(bool state);
     void driveIrqEn(bool state);
+    /** @} */
 
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
+  protected:
+    /** Handle a read to the distributor poriton of the GIC
+     * @param pkt packet to respond to
+     */
+    Tick readDistributor(PacketPtr pkt);
+
+    /** Handle a read to the cpu poriton of the GIC
+     * @param pkt packet to respond to
+     */
+    Tick readCpu(PacketPtr pkt);
+
+    /** Handle a write to the distributor poriton of the GIC
+     * @param pkt packet to respond to
+     */
+    Tick writeDistributor(PacketPtr pkt);
+
+    /** Handle a write to the cpu poriton of the GIC
+     * @param pkt packet to respond to
+     */
+    Tick writeCpu(PacketPtr pkt);
 };
 
 #endif //__DEV_ARM_GIC_H__
-- 
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