From 7b2691d53725318810f78c712dbbe4733c319ef8 Mon Sep 17 00:00:00 2001
From: Lisa Hsu <hsul@eecs.umich.edu>
Date: Fri, 9 Jul 2004 11:50:27 -0400
Subject: when you add caches, dma commands within the state machine are
 delayed and cause the state machine to exit until the dma comes back.  thus,
 all relevant code must be executed BEFORE going to do the dma code.

dev/ns_gige.cc:
    rearrange code so nothing gets skipped when "doing dma."

--HG--
extra : convert_revision : cca66885f45e7df1831e2d8ccaddf5ece7600b13
---
 dev/ns_gige.cc | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index f88fc507f..68a50bcce 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -1889,11 +1889,7 @@ NSGigE::txKick()
                 descDmaWrites++;
                 descDmaWrBytes += txDmaLen;
 
-                if (doTxDmaWrite())
-                    goto exit;
-
                 transmit();
-
                 txPacket = 0;
 
                 if (txHalt) {
@@ -1902,6 +1898,9 @@ NSGigE::txKick()
                     txHalt = false;
                 } else
                     txState = txAdvance;
+
+                if (doTxDmaWrite())
+                    goto exit;
             }
         } else {
             DPRINTF(EthernetSM, "this descriptor isn't done yet\n");
-- 
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