From 8a0bc840221cf7af4845f4ee44de11bc7271ff10 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 29 Jun 2005 01:20:41 -0400 Subject: Allow CPUs to specify their own CPU ids. Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788 --- cpu/base.cc | 12 +++++------ cpu/base.hh | 1 + cpu/o3/alpha_cpu_builder.cc | 8 +++----- cpu/simple/cpu.cc | 10 +++------ dev/alpha_console.cc | 11 ++++------ dev/alpha_console.hh | 4 ++-- python/m5/objects/AlphaConsole.py | 1 - python/m5/objects/BaseCPU.py | 1 + sim/system.cc | 43 +++++++++++++++++++++++++-------------- sim/system.hh | 11 +++++++++- 10 files changed, 58 insertions(+), 44 deletions(-) diff --git a/cpu/base.cc b/cpu/base.cc index 9e66d934f..50c777b0d 100644 --- a/cpu/base.cc +++ b/cpu/base.cc @@ -189,15 +189,15 @@ BaseCPU::registerExecContexts() { for (int i = 0; i < execContexts.size(); ++i) { ExecContext *xc = execContexts[i]; - int cpu_id; - #ifdef FULL_SYSTEM - cpu_id = system->registerExecContext(xc); + int id = params->cpu_id; + if (id != -1) + id += i; + + xc->cpu_id = system->registerExecContext(xc, id); #else - cpu_id = xc->process->registerExecContext(xc); + xc->cpu_id = xc->process->registerExecContext(xc); #endif - - xc->cpu_id = cpu_id; } } diff --git a/cpu/base.hh b/cpu/base.hh index cafe70b75..e28f15884 100644 --- a/cpu/base.hh +++ b/cpu/base.hh @@ -111,6 +111,7 @@ class BaseCPU : public SimObject Tick functionTraceStart; #ifdef FULL_SYSTEM System *system; + int cpu_id; #endif }; diff --git a/cpu/o3/alpha_cpu_builder.cc b/cpu/o3/alpha_cpu_builder.cc index 57061c052..57c567471 100644 --- a/cpu/o3/alpha_cpu_builder.cc +++ b/cpu/o3/alpha_cpu_builder.cc @@ -71,9 +71,9 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivAlphaFullCPU) #ifdef FULL_SYSTEM SimObjectParam system; +Param cpu_id; SimObjectParam itb; SimObjectParam dtb; -Param mult; #else SimObjectVectorParam workload; #endif // FULL_SYSTEM @@ -164,9 +164,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivAlphaFullCPU) #ifdef FULL_SYSTEM INIT_PARAM(system, "System object"), + INIT_PARAM(cpu_id, "processor ID"), INIT_PARAM(itb, "Instruction translation buffer"), INIT_PARAM(dtb, "Data translation buffer"), - INIT_PARAM(mult, "System clock multiplier"), #else INIT_PARAM(workload, "Processes to run"), #endif // FULL_SYSTEM @@ -274,9 +274,6 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU) DerivAlphaFullCPU *cpu; #ifdef FULL_SYSTEM - if (mult != 1) - panic("Processor clock multiplier must be 1?\n"); - // Full-system only supports a single thread for the moment. int actual_num_threads = 1; #else @@ -300,6 +297,7 @@ CREATE_SIM_OBJECT(DerivAlphaFullCPU) #ifdef FULL_SYSTEM params.system = system; + params.cpu_id = cpu_id; params.itb = itb; params.dtb = dtb; #else diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index de28913e4..1164e35a4 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -823,7 +823,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU) SimObjectParam dtb; SimObjectParam mem; SimObjectParam system; - Param mult; + Param cpu_id; #else SimObjectParam workload; #endif // FULL_SYSTEM @@ -855,7 +855,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU) INIT_PARAM(dtb, "Data TLB"), INIT_PARAM(mem, "memory"), INIT_PARAM(system, "system object"), - INIT_PARAM(mult, "system clock multiplier"), + INIT_PARAM(cpu_id, "processor ID"), #else INIT_PARAM(workload, "processes to run"), #endif // FULL_SYSTEM @@ -873,11 +873,6 @@ END_INIT_SIM_OBJECT_PARAMS(SimpleCPU) CREATE_SIM_OBJECT(SimpleCPU) { -#ifdef FULL_SYSTEM - if (mult != 1) - panic("processor clock multiplier must be 1\n"); -#endif - SimpleCPU::Params *params = new SimpleCPU::Params(); params->name = getInstanceName(); params->numberOfThreads = 1; @@ -898,6 +893,7 @@ CREATE_SIM_OBJECT(SimpleCPU) params->dtb = dtb; params->mem = mem; params->system = system; + params->cpu_id = cpu_id; #else params->process = workload; #endif diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 34c2978aa..c4799bf6b 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -56,7 +56,7 @@ using namespace std; AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, System *s, BaseCPU *c, Platform *p, - int num_cpus, MemoryController *mmu, Addr a, + MemoryController *mmu, Addr a, HierParams *hier, Bus *bus) : PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a) { @@ -72,7 +72,6 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, alphaAccess->last_offset = size - 1; alphaAccess->version = ALPHA_ACCESS_VERSION; - alphaAccess->numCPUs = num_cpus; alphaAccess->diskUnit = 1; alphaAccess->diskCount = 0; @@ -89,8 +88,9 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, } void -AlphaConsole::init() +AlphaConsole::startup() { + alphaAccess->numCPUs = system->getNumCPUs(); alphaAccess->kernStart = system->getKernelStart(); alphaAccess->kernEnd = system->getKernelEnd(); alphaAccess->entryPoint = system->getKernelEntry(); @@ -330,7 +330,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) SimObjectParam sim_console; SimObjectParam disk; - Param num_cpus; SimObjectParam mmu; Param addr; SimObjectParam system; @@ -346,7 +345,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) INIT_PARAM(sim_console, "The Simulator Console"), INIT_PARAM(disk, "Simple Disk"), - INIT_PARAM_DFLT(num_cpus, "Number of CPU's", 1), INIT_PARAM(mmu, "Memory Controller"), INIT_PARAM(addr, "Device Address"), INIT_PARAM(system, "system object"), @@ -361,8 +359,7 @@ END_INIT_SIM_OBJECT_PARAMS(AlphaConsole) CREATE_SIM_OBJECT(AlphaConsole) { return new AlphaConsole(getInstanceName(), sim_console, disk, - system, cpu, platform, num_cpus, mmu, - addr, hier, io_bus); + system, cpu, platform, mmu, addr, hier, io_bus); } REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index eb59626f5..6236c5713 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -102,10 +102,10 @@ class AlphaConsole : public PioDevice /** Standard Constructor */ AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d, System *s, BaseCPU *c, Platform *platform, - int num_cpus, MemoryController *mmu, Addr addr, + MemoryController *mmu, Addr addr, HierParams *hier, Bus *bus); - virtual void init(); + virtual void startup(); /** * memory mapped reads and writes diff --git a/python/m5/objects/AlphaConsole.py b/python/m5/objects/AlphaConsole.py index 32a137bec..f8f034682 100644 --- a/python/m5/objects/AlphaConsole.py +++ b/python/m5/objects/AlphaConsole.py @@ -5,6 +5,5 @@ class AlphaConsole(PioDevice): type = 'AlphaConsole' cpu = Param.BaseCPU(Parent.any, "Processor") disk = Param.SimpleDisk("Simple Disk") - num_cpus = Param.Int(1, "Number of CPUs") sim_console = Param.SimConsole(Parent.any, "The Simulator Console") system = Param.System(Parent.any, "system object") diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py index 452b97c84..a90203729 100644 --- a/python/m5/objects/BaseCPU.py +++ b/python/m5/objects/BaseCPU.py @@ -10,6 +10,7 @@ class BaseCPU(SimObject): itb = Param.AlphaITB("Instruction TLB") mem = Param.FunctionalMemory("memory") system = Param.System(Parent.any, "system object") + cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") diff --git a/sim/system.cc b/sim/system.cc index 8397b8e01..6f7d53f6b 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -46,7 +46,7 @@ int System::numSystemsRunning = 0; System::System(Params *p) : SimObject(p->name), memctrl(p->memctrl), physmem(p->physmem), - init_param(p->init_param), params(p) + init_param(p->init_param), numcpus(0), params(p) { // add self to global system list systemList.push_back(this); @@ -204,13 +204,26 @@ System::breakpoint() } int -System::registerExecContext(ExecContext *xc) +System::registerExecContext(ExecContext *xc, int id) { - int xcIndex = execContexts.size(); - execContexts.push_back(xc); + if (id == -1) { + for (id = 0; id < execContexts.size(); id++) { + if (!execContexts[id]) + break; + } + } + + if (execContexts.size() <= id) + execContexts.resize(id + 1); + + if (execContexts[id]) + panic("Cannot have two CPUs with the same id (%d)\n", id); + + execContexts[id] = xc; + numcpus++; RemoteGDB *rgdb = new RemoteGDB(this, xc); - GDBListener *gdbl = new GDBListener(rgdb, 7000 + xcIndex); + GDBListener *gdbl = new GDBListener(rgdb, 7000 + id); gdbl->listen(); /** * Uncommenting this line waits for a remote debugger to connect @@ -218,13 +231,13 @@ System::registerExecContext(ExecContext *xc) */ //gdbl->accept(); - if (remoteGDB.size() <= xcIndex) { - remoteGDB.resize(xcIndex+1); + if (remoteGDB.size() <= id) { + remoteGDB.resize(id + 1); } - remoteGDB[xcIndex] = rgdb; + remoteGDB[id] = rgdb; - return xcIndex; + return id; } void @@ -238,15 +251,15 @@ System::startup() } void -System::replaceExecContext(ExecContext *xc, int xcIndex) +System::replaceExecContext(ExecContext *xc, int id) { - if (xcIndex >= execContexts.size()) { - panic("replaceExecContext: bad xcIndex, %d >= %d\n", - xcIndex, execContexts.size()); + if (id >= execContexts.size()) { + panic("replaceExecContext: bad id, %d >= %d\n", + id, execContexts.size()); } - execContexts[xcIndex] = xc; - remoteGDB[xcIndex]->replaceExecContext(xc); + execContexts[id] = xc; + remoteGDB[id]->replaceExecContext(xc); } void diff --git a/sim/system.hh b/sim/system.hh index ab6d264ea..870805e4c 100644 --- a/sim/system.hh +++ b/sim/system.hh @@ -58,6 +58,15 @@ class System : public SimObject uint64_t init_param; std::vector execContexts; + int numcpus; + + int getNumCPUs() + { + if (numcpus != execContexts.size()) + panic("cpu array not fully populated!"); + + return numcpus; + } /** kernel Symbol table */ SymbolTable *kernelSymtab; @@ -150,7 +159,7 @@ class System : public SimObject */ Addr getKernelEntry() const { return kernelEntry; } - int registerExecContext(ExecContext *xc); + int registerExecContext(ExecContext *xc, int xcIndex); void replaceExecContext(ExecContext *xc, int xcIndex); void regStats(); -- cgit v1.2.3