From 92bdf57be45bd366cdf1a26630d761f58eaacbdd Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:15 -0500
Subject: ARM: Even though writes to MVFR0/1 should be unpredictable, we need
 to make them to do nothing.

---
 src/arch/arm/isa/formats/fp.isa | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 284876311..d509fc28a 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -328,6 +328,12 @@ let {{
                   case 1:
                     specReg = MISCREG_FPSCR;
                     break;
+                  case 6:
+                    specReg = MISCREG_MVFR1;
+                    break;
+                  case 7:
+                    specReg = MISCREG_MVFR0;
+                    break;
                   case 8:
                     specReg = MISCREG_FPEXC;
                     break;
-- 
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