From 9dfbea68a204ca93ef9d20a13dd2fe7288121c75 Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Wed, 9 May 2007 22:34:54 -0400
Subject: update for new reschedule semantics

--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
---
 src/dev/i8254xGBe.cc   | 16 ++++------------
 src/dev/io_device.cc   |  5 +----
 src/dev/ns_gige.cc     |  5 +----
 src/dev/sinic.cc       |  5 +----
 src/sim/eventq.hh      | 17 ++++++++++++-----
 src/sim/pseudo_inst.cc | 10 ++--------
 6 files changed, 21 insertions(+), 37 deletions(-)

diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index e54249dee..680e31656 100644
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -727,12 +727,8 @@ IGbE::RxDescCache::pktComplete()
     if (igbe->regs.rdtr.delay()) {
         DPRINTF(EthernetSM, "RXS: Scheduling DTR for %d\n",
                 igbe->regs.rdtr.delay() * igbe->intClock());
-        if (igbe->rdtrEvent.scheduled())
-            igbe->rdtrEvent.reschedule(curTick + igbe->regs.rdtr.delay() *
-                    igbe->intClock());
-        else
-            igbe->rdtrEvent.schedule(curTick + igbe->regs.rdtr.delay() *
-                    igbe->intClock());
+        igbe->rdtrEvent.reschedule(curTick + igbe->regs.rdtr.delay() *
+                    igbe->intClock(),true);
     }
 
     if (igbe->regs.radv.idv() && igbe->regs.rdtr.delay()) {
@@ -946,12 +942,8 @@ IGbE::TxDescCache::pktComplete()
         DPRINTF(EthernetDesc, "Descriptor had IDE set\n");
         if (igbe->regs.tidv.idv()) {
             DPRINTF(EthernetDesc, "setting tidv\n");
-            if (igbe->tidvEvent.scheduled())
-                igbe->tidvEvent.reschedule(curTick + igbe->regs.tidv.idv() *
-                        igbe->intClock());
-            else
-                igbe->tidvEvent.schedule(curTick + igbe->regs.tidv.idv() *
-                        igbe->intClock());
+            igbe->tidvEvent.reschedule(curTick + igbe->regs.tidv.idv() *
+                        igbe->intClock(), true);
         }
 
         if (igbe->regs.tadv.idv() && igbe->regs.tidv.idv()) {
diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc
index 9384c4b92..d430ace72 100644
--- a/src/dev/io_device.cc
+++ b/src/dev/io_device.cc
@@ -111,10 +111,7 @@ DmaPort::recvTiming(PacketPtr pkt)
         else if (backoffTime < device->maxBackoffDelay)
             backoffTime <<= 1;
 
-        if (backoffEvent.scheduled())
-            backoffEvent.reschedule(curTick + backoffTime);
-        else
-            backoffEvent.schedule(curTick + backoffTime);
+        backoffEvent.reschedule(curTick + backoffTime, true);
 
         DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
 
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index bec1fb848..d9985f808 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -2310,10 +2310,7 @@ NSGigE::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    if (txEvent.scheduled())
-        txEvent.reschedule(curTick + cycles(1));
-    else
-        txEvent.schedule(curTick + cycles(1));
+    txEvent.reschedule(curTick + cycles(1), true);
 }
 
 bool
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 1a72652da..420761620 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -1199,10 +1199,7 @@ Device::transferDone()
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    if (txEvent.scheduled())
-        txEvent.reschedule(curTick + cycles(1));
-    else
-        txEvent.schedule(curTick + cycles(1));
+    txEvent.reschedule(curTick + cycles(1), true);
 }
 
 bool
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index a57e9077e..974313968 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -210,7 +210,8 @@ class Event : public Serializable, public FastAlloc
     void schedule(Tick t);
 
     /// Reschedule the event with the current priority
-    void reschedule(Tick t);
+    // always parameter means to schedule if not already scheduled
+    void reschedule(Tick t, bool always = false);
 
     /// Remove the event from the current schedule
     void deschedule();
@@ -402,16 +403,22 @@ Event::deschedule()
 }
 
 inline void
-Event::reschedule(Tick t)
+Event::reschedule(Tick t, bool always)
 {
-    assert(scheduled());
-    clearFlags(Squashed);
+    assert(scheduled() || always);
 
 #if TRACING_ON
     when_scheduled = curTick;
 #endif
     _when = t;
-    queue->reschedule(this);
+
+    if (scheduled()) {
+        clearFlags(Squashed);
+        queue->reschedule(this);
+    } else {
+        setFlags(Scheduled);
+        queue->schedule(this);
+    }
 }
 
 inline void
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 56a779674..10127aa5f 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -87,10 +87,7 @@ namespace PseudoInst
 
         Tick resume = curTick + Clock::Int::ns * ns;
 
-        if (quiesceEvent->scheduled())
-            quiesceEvent->reschedule(resume);
-        else
-            quiesceEvent->schedule(resume);
+        quiesceEvent->reschedule(resume, true);
 
         DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
                 tc->getCpuPtr()->name(), ns, resume);
@@ -110,10 +107,7 @@ namespace PseudoInst
 
         Tick resume = curTick + tc->getCpuPtr()->cycles(cycles);
 
-        if (quiesceEvent->scheduled())
-            quiesceEvent->reschedule(resume);
-        else
-            quiesceEvent->schedule(resume);
+        quiesceEvent->reschedule(resume, true);
 
         DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
                 tc->getCpuPtr()->name(), cycles, resume);
-- 
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