From 9f1c104ccd835ce390d9e9fd24e59a6ea626ed17 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Tue, 22 May 2007 06:22:27 -0700 Subject: memtest.py: Make clocks more reasonable. Fix bug in sense of options.timing flag. configs/example/memtest.py: Fix bug in sense of options.timing flag. configs/example/memtest.py: Make clocks more reasonable. --HG-- extra : convert_revision : 3715697988c56e92a4da129b42026d0623f5e85e --- configs/example/memtest.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/example/memtest.py b/configs/example/memtest.py index 5300c6fd9..9fd943aaa 100644 --- a/configs/example/memtest.py +++ b/configs/example/memtest.py @@ -75,7 +75,7 @@ if options.numtesters > 8: print "Error: NUmber of testers limited to 8 because of false sharing" sys,exit(1) -cpus = [ MemTest(atomic=options.timing, max_loads=options.maxloads, +cpus = [ MemTest(atomic=not options.timing, max_loads=options.maxloads, percent_functional=50, percent_uncacheable=10, progress_interval=1000) for i in xrange(options.numtesters) ] @@ -83,11 +83,11 @@ cpus = [ MemTest(atomic=options.timing, max_loads=options.maxloads, # system simulated system = System(cpu = cpus, funcmem = PhysicalMemory(), physmem = PhysicalMemory(latency = "50ps"), - membus = Bus(clock="500GHz", width=16)) + membus = Bus(clock="500MHz", width=16)) # l2cache & bus if options.caches: - system.toL2Bus = Bus(clock="500GHz", width=16) + system.toL2Bus = Bus(clock="500MHz", width=16) system.l2c = L2(size='64kB', assoc=8) system.l2c.cpu_side = system.toL2Bus.port @@ -118,6 +118,9 @@ if options.timing: else: root.system.mem_mode = 'atomic' +# Not much point in this being higher than the L1 latency +m5.ticks.setGlobalFrequency('1ns') + # instantiate configuration m5.instantiate(root) -- cgit v1.2.3