From c6c61870fac8975630e66232dd4e7343e1e8df05 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Thu, 11 Mar 2004 12:45:27 -0500 Subject: It was annoying me that there was PCIConfigAll and PciDev and PciConfigData. so for consistency I changed it. dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: dev/tsunami.hh: change PCIConfigAll to PciConfigAll --HG-- extra : convert_revision : d2fa3f59b906c870fd9d46cfa94728c7587e3652 --- dev/pciconfigall.cc | 28 ++++++++++++++-------------- dev/pciconfigall.hh | 4 ++-- dev/pcidev.cc | 2 +- dev/pcidev.hh | 6 +++--- dev/tsunami.hh | 4 ++-- 5 files changed, 22 insertions(+), 22 deletions(-) diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc index 63943c7be..4467ce1e5 100644 --- a/dev/pciconfigall.cc +++ b/dev/pciconfigall.cc @@ -47,7 +47,7 @@ using namespace std; -PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a, +PciConfigAll::PciConfigAll(const string &name, Tsunami *t, Addr a, MemoryController *mmu) : FunctionalMemory(name), addr(a), tsunami(t) { @@ -63,9 +63,9 @@ PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a, } Fault -PCIConfigAll::read(MemReqPtr &req, uint8_t *data) +PciConfigAll::read(MemReqPtr &req, uint8_t *data) { - DPRINTF(PCIConfigAll, "read va=%#x size=%d\n", + DPRINTF(PciConfigAll, "read va=%#x size=%d\n", req->vaddr, req->size); Addr daddr = (req->paddr - (addr & PA_IMPL_MASK)); @@ -110,7 +110,7 @@ PCIConfigAll::read(MemReqPtr &req, uint8_t *data) } Fault -PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) +PciConfigAll::write(MemReqPtr &req, const uint8_t *data) { Addr daddr = (req->paddr - (addr & PA_IMPL_MASK)); @@ -142,7 +142,7 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) } } - DPRINTF(PCIConfigAll, "write - va=%#x size=%d data=%#x\n", + DPRINTF(PciConfigAll, "write - va=%#x size=%d data=%#x\n", req->vaddr, req->size, word_value); devices[device][func]->WriteConfig(reg, req->size, word_value); @@ -151,42 +151,42 @@ PCIConfigAll::write(MemReqPtr &req, const uint8_t *data) } void -PCIConfigAll::serialize(std::ostream &os) +PciConfigAll::serialize(std::ostream &os) { // code should be written } void -PCIConfigAll::unserialize(Checkpoint *cp, const std::string §ion) +PciConfigAll::unserialize(Checkpoint *cp, const std::string §ion) { //code should be written } #ifndef DOXYGEN_SHOULD_SKIP_THIS -BEGIN_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll) +BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll) SimObjectParam tsunami; SimObjectParam mmu; Param addr; Param mask; -END_DECLARE_SIM_OBJECT_PARAMS(PCIConfigAll) +END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll) -BEGIN_INIT_SIM_OBJECT_PARAMS(PCIConfigAll) +BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigAll) INIT_PARAM(tsunami, "Tsunami"), INIT_PARAM(mmu, "Memory Controller"), INIT_PARAM(addr, "Device Address"), INIT_PARAM(mask, "Address Mask") -END_INIT_SIM_OBJECT_PARAMS(PCIConfigAll) +END_INIT_SIM_OBJECT_PARAMS(PciConfigAll) -CREATE_SIM_OBJECT(PCIConfigAll) +CREATE_SIM_OBJECT(PciConfigAll) { - return new PCIConfigAll(getInstanceName(), tsunami, addr, mmu); + return new PciConfigAll(getInstanceName(), tsunami, addr, mmu); } -REGISTER_SIM_OBJECT("PCIConfigAll", PCIConfigAll) +REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll) #endif // DOXYGEN_SHOULD_SKIP_THIS diff --git a/dev/pciconfigall.hh b/dev/pciconfigall.hh index 95a171c53..e0f7f6ada 100644 --- a/dev/pciconfigall.hh +++ b/dev/pciconfigall.hh @@ -54,7 +54,7 @@ class PciDev; * space and passes the requests on to TsunamiPCIDev devices as * appropriate. */ -class PCIConfigAll : public FunctionalMemory +class PciConfigAll : public FunctionalMemory { private: Addr addr; @@ -79,7 +79,7 @@ class PCIConfigAll : public FunctionalMemory /** * The default constructor. */ - PCIConfigAll(const std::string &name, Tsunami *t, Addr a, + PciConfigAll(const std::string &name, Tsunami *t, Addr a, MemoryController *mmu); virtual Fault read(MemReqPtr &req, uint8_t *data); diff --git a/dev/pcidev.cc b/dev/pcidev.cc index 1706bdd5a..0e0b7f840 100644 --- a/dev/pcidev.cc +++ b/dev/pcidev.cc @@ -51,7 +51,7 @@ using namespace std; -PciDev::PciDev(const string &name, MemoryController *mmu, PCIConfigAll *cf, +PciDev::PciDev(const string &name, MemoryController *mmu, PciConfigAll *cf, PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func) : FunctionalMemory(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd), Bus(bus), Device(dev), Function(func) diff --git a/dev/pcidev.hh b/dev/pcidev.hh index dcd3d1b8a..6496791b2 100644 --- a/dev/pcidev.hh +++ b/dev/pcidev.hh @@ -37,7 +37,7 @@ #include "sim/sim_object.hh" #include "mem/functional_mem/functional_memory.hh" -class PCIConfigAll; +class PciConfigAll; class MemoryController; class PciConfigData : public SimObject @@ -67,7 +67,7 @@ class PciDev : public FunctionalMemory { protected: MemoryController *MMU; - PCIConfigAll *ConfigSpace; + PciConfigAll *ConfigSpace; PciConfigData *ConfigData; uint32_t Bus; uint32_t Device; @@ -78,7 +78,7 @@ class PciDev : public FunctionalMemory Addr BARAddrs[6]; public: - PciDev(const std::string &name, MemoryController *mmu, PCIConfigAll *cf, + PciDev(const std::string &name, MemoryController *mmu, PciConfigAll *cf, PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func); virtual Fault read(MemReqPtr &req, uint8_t *data) { diff --git a/dev/tsunami.hh b/dev/tsunami.hh index ef27ff18e..bcbd9c756 100644 --- a/dev/tsunami.hh +++ b/dev/tsunami.hh @@ -43,7 +43,7 @@ class EtherDev; class TsunamiCChip; class TsunamiPChip; class TsunamiIO; -class PCIConfigAll; +class PciConfigAll; class System; /** @@ -85,7 +85,7 @@ class Tsunami : public Platform * The config space in Tsunami all needs to return * -1 if a device is not there. */ - PCIConfigAll *pciconfig; + PciConfigAll *pciconfig; int intr_sum_type[Tsunami::Max_CPUs]; int ipi_pending[Tsunami::Max_CPUs]; -- cgit v1.2.3