From d2186857b15ccdfe58b6d9e1369946253c28fb02 Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 3 Jun 2010 12:20:49 -0400
Subject: ARM: Fix issue with m5.fast and ARM

---
 src/arch/arm/isa.cc | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 60f00e438..17f95e57d 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -424,10 +424,7 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
                       flags = TLB::MustBeOne | TLB::UserMode;
                       mode = BaseTLB::Write;
                       break;
-                  case MISCREG_V2POWPR:
-                  case MISCREG_V2POWPW:
-                  case MISCREG_V2POWUR:
-                  case MISCREG_V2POWUW:
+                  default:
                       panic("Security Extensions not implemented!");
               }
               req->setVirt(0, val, 1, flags, tc->readPC());
-- 
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