From d3ecb5d406a3dc12c53a20c271db3027b8477c39 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Thu, 23 Nov 2017 14:31:36 +0000 Subject: cpu-o3: Add missing vector stat initializers All of the O3 vector stats added by 'arch: ISA parser additions of vector registers' are currently missing their stat initializers. Add the missing stat initialization to InstructionQueue::regStats. Change-Id: Idc4b8e2824120a2542d8a604340a1b41bde6aa28 Signed-off-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/6101 Reviewed-by: Gabe Black Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- src/cpu/o3/inst_queue_impl.hh | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 3da72fd86..f70f66274 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -369,6 +369,21 @@ InstructionQueue::regStats() .desc("Number of floating instruction queue wakeup accesses") .flags(total); + vecInstQueueReads + .name(name() + ".vec_inst_queue_reads") + .desc("Number of vector instruction queue reads") + .flags(total); + + vecInstQueueWrites + .name(name() + ".vec_inst_queue_writes") + .desc("Number of vector instruction queue writes") + .flags(total); + + vecInstQueueWakeupAccesses + .name(name() + ".vec_inst_queue_wakeup_accesses") + .desc("Number of vector instruction queue wakeup accesses") + .flags(total); + intAluAccesses .name(name() + ".int_alu_accesses") .desc("Number of integer alu accesses") @@ -379,6 +394,11 @@ InstructionQueue::regStats() .desc("Number of floating point alu accesses") .flags(total); + vecAluAccesses + .name(name() + ".vec_alu_accesses") + .desc("Number of vector alu accesses") + .flags(total); + } template -- cgit v1.2.3